Searched refs:Addr (Results 551 - 575 of 767) sorted by relevance

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/gem5/src/arch/x86/
H A Ddecoder.hh90 Addr basePC;
92 Addr origPC;
308 void moreBytes(const PCState &pc, Addr fetchPC, MachInst data)
348 StaticInstPtr decode(ExtMachInst mach_inst, Addr addr);
/gem5/src/mem/cache/tags/
H A Dbase.cc78 BaseTags::findBlock(Addr addr, bool is_secure) const
81 Addr tag = extractTag(addr);
128 Addr
129 BaseTags::extractTag(const Addr addr) const
H A Dfa_lru.cc141 FALRU::accessBlock(Addr addr, bool is_secure, Cycles &lat)
147 FALRU::accessBlock(Addr addr, bool is_secure, Cycles &lat,
173 FALRU::findBlock(Addr addr, bool is_secure) const
177 Addr tag = extractTag(addr);
199 FALRU::findVictim(Addr addr, const bool is_secure, const std::size_t size,
/gem5/src/arch/alpha/
H A Dutility.cc55 Addr sp = tc->readIntReg(StackPointerReg);
/gem5/src/arch/arm/tracers/
H A Dtarmac_base.cc92 Addr _addr,
/gem5/src/cpu/testers/directedtest/
H A DRubyDirectedTester.hh92 void hitCallback(NodeID proc, Addr addr);
H A DRubyDirectedTester.cc117 RubyDirectedTester::hitCallback(NodeID proc, Addr addr)
/gem5/src/cpu/testers/garnet_synthetic_traffic/
H A DGarnetSyntheticTraffic.hh74 void printAddr(Addr a);
/gem5/src/dev/net/
H A Dns_gige.hh204 Addr txFragPtr;
220 Addr rxFragPtr;
243 Addr rxDmaAddr;
249 Addr txDmaAddr;
/gem5/src/mem/
H A Dmem_checker_monitor.cc91 Addr addr = pkt->getAddr();
109 Addr addr = pkt->getAddr();
148 Addr addr = pkt->getAddr();
238 Addr addr = pkt->getAddr();
H A Dport.cc99 MasterPort::printAddr(Addr a)
H A Dpacket.hh343 Addr addr;
728 Addr getAddr() const { assert(flags.isSet(VALID_ADDR)); return addr; }
736 void setAddr(Addr _addr) { assert(flags.isSet(VALID_ADDR)); addr = _addr; }
747 Addr getOffset(unsigned int blk_size) const
749 return getAddr() & Addr(blk_size - 1);
752 Addr getBlockAddr(unsigned int blk_size) const
754 return getAddr() & ~(Addr(blk_size - 1));
992 bool matchBlockAddr(const Addr addr, const bool is_secure,
1012 bool matchAddr(const Addr addr, const bool is_secure) const;
1338 trySatisfyFunctional(Printable *obj, Addr bas
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/gem5/src/cpu/pred/
H A Dtage_base.cc183 TAGEBase::btbUpdate(ThreadID tid, Addr branch_pc, BranchInfo* &bi)
202 TAGEBase::bindex(Addr pc_in) const
225 TAGEBase::gindex(ThreadID tid, Addr pc, int bank) const
243 TAGEBase::gtag(ThreadID tid, Addr pc, int bank) const
288 TAGEBase::getBimodePred(Addr pc, BranchInfo* bi) const
297 TAGEBase::baseUpdate(Addr pc, bool taken, BranchInfo* bi)
335 TAGEBase::calculateIndicesAndTags(ThreadID tid, Addr branch_pc,
348 TAGEBase::getUseAltIdx(BranchInfo* bi, Addr branch_pc)
355 TAGEBase::tagePredict(ThreadID tid, Addr branch_pc,
358 Addr p
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/gem5/src/mem/ruby/slicc_interface/
H A DRubySlicc_ComponentMapping.hh50 mapAddressToRange(Addr addr, MachineType type, int low_bit,
/gem5/src/arch/arm/
H A Dremote_gdb.hh67 bool acc(Addr addr, size_t len);
H A Dsemihosting.cc270 ArmSemihosting::readString(ThreadContext *tc, Addr ptr, size_t len)
284 const Addr name_base = argv[1];
286 const Addr name_size = argv[3];
349 for (Addr addr = (Addr)argv[0]; ; ++addr) {
469 const Addr guest_buf = argv[1];
553 proxy.writeBlob((Addr)argv[1], cmdLine.c_str(), cmdLine.size() + 1);
575 const Addr mem_start = memory.start() + memReserve;
576 Addr mem_end = memory.end();
580 const Addr phys_ma
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H A Dutility.cc109 Addr sp = tc->readIntReg(StackPointerReg);
384 Addr
385 purifyTaggedAddr(Addr addr, ThreadContext *tc, ExceptionLevel el,
415 Addr
416 purifyTaggedAddr(Addr addr, ThreadContext *tc, ExceptionLevel el)
449 Addr
450 truncPage(Addr addr)
455 Addr
456 roundPage(Addr addr)
/gem5/src/arch/arm/insts/
H A Dstatic_inst.hh172 void printTarget(std::ostream &os, Addr target,
177 const std::string &prefix, const Addr addr,
200 Addr pc, const SymbolTable *symtab) const override;
298 static inline Addr
305 setNextPC(ExecContext *xc, Addr val)
347 setIWNextPC(ExecContext *xc, Addr val)
357 setAIWNextPC(ExecContext *xc, Addr val)
/gem5/src/cpu/minor/
H A Dexec_context.hh114 initiateMemRead(Addr addr, unsigned int size,
124 writeMem(uint8_t *data, unsigned int size, Addr addr,
135 initiateMemAMO(Addr addr, unsigned int size, Request::Flags flags,
409 demapPage(Addr vaddr, uint64_t asn) override
432 demapInstPage(Addr vaddr, uint64_t asn)
438 demapDataPage(Addr vaddr, uint64_t asn)
447 void armMonitor(Addr address) override
/gem5/src/cpu/simple/
H A Datomic.cc338 AtomicSimpleCPU::genMemFragmentRequest(const RequestPtr& req, Addr frag_addr,
344 Addr inst_addr = threadInfo[curThread]->thread->pcState().instAddr();
348 (Addr) size_left);
372 AtomicSimpleCPU::readMem(Addr addr, uint8_t * data, unsigned size,
389 Addr frag_addr = addr;
454 AtomicSimpleCPU::writeMem(uint8_t *data, unsigned size, Addr addr,
479 Addr frag_addr = addr;
568 AtomicSimpleCPU::amoMem(Addr addr, uint8_t* data, unsigned size,
582 Addr secondAddr = roundDown(addr + size - 1, cacheLineSize());
781 AtomicSimpleCPU::printAddr(Addr
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/gem5/src/cpu/testers/rubytest/
H A DCheck.cc39 Check::Check(Addr address, Addr pc, int _num_writers, int _num_readers,
178 Addr writeAddr(m_address + m_store_count);
282 Addr address = data->getAddress();
344 Check::changeAddress(Addr address)
/gem5/src/arch/sparc/
H A Dfaults.cc318 Addr pcMask = pstate.am ? mask(32) : mask(64);
399 Addr pcMask = pstate.am ? mask(32) : mask(64);
473 getREDVector(RegVal TT, Addr &PC, Addr &NPC)
476 const Addr RSTVAddr = 0xFFF0000000ULL;
482 getHyperVector(ThreadContext * tc, Addr &PC, Addr &NPC, RegVal TT)
484 Addr HTBA = tc->readMiscRegNoEffect(MISCREG_HTBA);
490 getPrivVector(ThreadContext *tc, Addr &PC, Addr
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/gem5/src/arch/hsail/insts/
H A Dmem_impl.hh62 std::vector<Addr> addr_vec;
63 addr_vec.resize(w->computeUnit->wfSize(), (Addr)0);
122 static Addr
123 calcPrivAddr(Addr addr, Wavefront *w, int lane, GPUStaticInst *i)
149 Addr addr_div8 = addr / 8;
150 Addr addr_mod8 = addr % 8;
152 Addr ret = addr_div8 * 8 * w->computeUnit->wfSize() + lane * 8 +
258 Addr privAddr = calcPrivAddr(m->addr[lane], w, lane,
435 Addr privAddr = calcPrivAddr(m->addr[lane], w, lane,
/gem5/src/arch/hsail/
H A Doperand.hh591 virtual void calcVector(Wavefront *w, std::vector<Addr> &addrVec) = 0;
606 void calcVector(Wavefront *w, std::vector<Addr> &addrVec);
672 std::vector<Addr> &addrVec)
674 Addr address = calcUniformBase();
681 addrVec[lane] = address + reg.template get<Addr>(w, lane);
691 Addr address = calcUniformBase();
693 return address + reg.template get<Addr>(w, lane);
711 void calcVector(Wavefront *w, std::vector<Addr> &addrVec);
729 NoRegAddrOperand::calcVector(Wavefront *w, std::vector<Addr> &addrVec)
/gem5/src/mem/ruby/system/
H A DSequencer.cc173 Addr line_addr = makeLineAddress(pkt->getAddr());
254 Sequencer::invalidateSC(Addr address)
265 Sequencer::handleLlsc(Addr address, SequencerRequest* request)
357 Sequencer::writeCallback(Addr address, DataBlock& data,
412 Sequencer::readCallback(Addr address, DataBlock& data,
448 Addr request_address(pkt->getAddr());
629 Addr pc = 0;
686 Sequencer::checkCoherence(Addr addr)
698 Sequencer::evictionCallback(Addr address)

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