Searched hist:6803 (Results 1 - 5 of 5) sorted by relevance
| /gem5/src/dev/x86/ | ||
| H A D | I82094AA.py | 6803:c647872c6590 Sat Dec 19 04:50:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> X86: Add a latency that describes how long an interrupt takes to propagate through the IO APIC. |
| H A D | i82094aa.cc | 6803:c647872c6590 Sat Dec 19 04:50:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> X86: Add a latency that describes how long an interrupt takes to propagate through the IO APIC. |
| /gem5/src/arch/arm/ | ||
| H A D | miscregs.cc | 12479:c686e4a1fe8f Wed Dec 06 17:51:00 EST 2017 Curtis Dunham <Curtis.Dunham@arm.com> arch-arm: understandably initialize register permissions Move massive initialization routine to the bottom of miscregs.cc. Additionally, share register metadata across ISA instances by making lookUpMiscReg a static member of the ISA and only initializing it once. Change-Id: I6d6ab26200c4e781151cc6efd97ce2420e2bf4cc Signed-off-by: Curtis Dunham <Curtis.Dunham@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jack Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/6803 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | isa.hh | 12479:c686e4a1fe8f Wed Dec 06 17:51:00 EST 2017 Curtis Dunham <Curtis.Dunham@arm.com> arch-arm: understandably initialize register permissions Move massive initialization routine to the bottom of miscregs.cc. Additionally, share register metadata across ISA instances by making lookUpMiscReg a static member of the ISA and only initializing it once. Change-Id: I6d6ab26200c4e781151cc6efd97ce2420e2bf4cc Signed-off-by: Curtis Dunham <Curtis.Dunham@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jack Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/6803 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | isa.cc | 12479:c686e4a1fe8f Wed Dec 06 17:51:00 EST 2017 Curtis Dunham <Curtis.Dunham@arm.com> arch-arm: understandably initialize register permissions Move massive initialization routine to the bottom of miscregs.cc. Additionally, share register metadata across ISA instances by making lookUpMiscReg a static member of the ISA and only initializing it once. Change-Id: I6d6ab26200c4e781151cc6efd97ce2420e2bf4cc Signed-off-by: Curtis Dunham <Curtis.Dunham@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jack Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/6803 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
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