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/gem5/ext/pybind11/tests/test_embed/
H A Dtest_interpreter.cpp14299:2fbea9df56d2 Mon Sep 23 16:52:00 EDT 2019 Bobby R. Bruce <bbruce@ucdavis.edu> ext: Updated Pybind11 to version 2.4.1.

This updates Pybind11 from version 2.2.1 to version 2.4.1. This fixes
warning/error received when "<experiment/optional>" is used when
compiling using c++14 with clang. It should be noted that
"ext/pybind11/include/pybind11/std.h" has been changed to include a fix
added by commit ba42457254cc362eddc099f22b60d469cc6369e0. This is
necessary to avoid build errors.

Built: Linux (gcc, c++11) and MacOS (clang, c++14).
Tested: Ran quick tests for X86, ARM, and RISC-V.
Deprecates: https://gem5-review.googlesource.com/c/public/gem5/+/21019
Change-Id: Ie9783511cb6be50136076a55330e645f4f36d075
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21119
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
H A Dcatch.cpp14299:2fbea9df56d2 Mon Sep 23 16:52:00 EDT 2019 Bobby R. Bruce <bbruce@ucdavis.edu> ext: Updated Pybind11 to version 2.4.1.

This updates Pybind11 from version 2.2.1 to version 2.4.1. This fixes
warning/error received when "<experiment/optional>" is used when
compiling using c++14 with clang. It should be noted that
"ext/pybind11/include/pybind11/std.h" has been changed to include a fix
added by commit ba42457254cc362eddc099f22b60d469cc6369e0. This is
necessary to avoid build errors.

Built: Linux (gcc, c++11) and MacOS (clang, c++14).
Tested: Ran quick tests for X86, ARM, and RISC-V.
Deprecates: https://gem5-review.googlesource.com/c/public/gem5/+/21019
Change-Id: Ie9783511cb6be50136076a55330e645f4f36d075
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21119
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
H A DCMakeLists.txt14299:2fbea9df56d2 Mon Sep 23 16:52:00 EDT 2019 Bobby R. Bruce <bbruce@ucdavis.edu> ext: Updated Pybind11 to version 2.4.1.

This updates Pybind11 from version 2.2.1 to version 2.4.1. This fixes
warning/error received when "<experiment/optional>" is used when
compiling using c++14 with clang. It should be noted that
"ext/pybind11/include/pybind11/std.h" has been changed to include a fix
added by commit ba42457254cc362eddc099f22b60d469cc6369e0. This is
necessary to avoid build errors.

Built: Linux (gcc, c++11) and MacOS (clang, c++14).
Tested: Ran quick tests for X86, ARM, and RISC-V.
Deprecates: https://gem5-review.googlesource.com/c/public/gem5/+/21019
Change-Id: Ie9783511cb6be50136076a55330e645f4f36d075
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21119
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
/gem5/ext/pybind11/tests/
H A Dtest_pytypes.cpp14299:2fbea9df56d2 Mon Sep 23 16:52:00 EDT 2019 Bobby R. Bruce <bbruce@ucdavis.edu> ext: Updated Pybind11 to version 2.4.1.

This updates Pybind11 from version 2.2.1 to version 2.4.1. This fixes
warning/error received when "<experiment/optional>" is used when
compiling using c++14 with clang. It should be noted that
"ext/pybind11/include/pybind11/std.h" has been changed to include a fix
added by commit ba42457254cc362eddc099f22b60d469cc6369e0. This is
necessary to avoid build errors.

Built: Linux (gcc, c++11) and MacOS (clang, c++14).
Tested: Ran quick tests for X86, ARM, and RISC-V.
Deprecates: https://gem5-review.googlesource.com/c/public/gem5/+/21019
Change-Id: Ie9783511cb6be50136076a55330e645f4f36d075
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21119
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
/gem5/src/mem/slicc/symbols/
H A DFunc.py11062:262d8494b253 Sun Aug 30 11:52:00 EDT 2015 Nilay Vaish <nilay@cs.wisc.edu> ruby: slicc: avoid duplicate code for function argument check
Both FuncCallExprAST and MethodCallExprAST had code for checking the arguments
with which a function is being called. The patch does away with this
duplication. Now the code for checking function call arguments resides in the
Func class.
9219:258753d3bc47 Wed Sep 12 15:52:00 EDT 2012 Jason Power <power.jg@gmail.com> Ruby: Modify Scons so that we can put .sm files in extras
Also allows for header files which are required in slicc generated
code to be in a directory other than src/mem/ruby/slicc_interface.
8337:b9ba22cb23f2 Fri Jun 03 14:52:00 EDT 2011 Nilay Vaish<nilay@cs.wisc.edu> SLICC: Remove machine name as prefix to functions
Currently, the machine name is appended before any of the functions
defined with in the sm files. This is not necessary and it also
means that these functions cannot be used outside the sm files.
This patch does away with the prefixes. Note that the generated
C++ files in which the code for these functions is present are
still named such that the machine name is the prefix.
/gem5/tests/configs/
H A Dt1000-simple-atomic.py9835:cc7a7fc71c42 Mon Aug 19 03:52:00 EDT 2013 Andreas Hansson <andreas.hansson@arm.com> mem: Change AbstractMemory defaults to match the common case

This patch changes the default parameter value of conf_table_reported
to match the common case. It also simplifies the regression and config
scripts to reflect this change.
9827:f47274776aa0 Mon Aug 19 03:52:00 EDT 2013 Akash Bagdia <akash.bagdia@arm.com> power: Add voltage domains to the clock domains

This patch adds the notion of voltage domains, and groups clock
domains that operate under the same voltage (i.e. power supply) into
domains. Each clock domain is required to be associated with a voltage
domain, and the latter requires the voltage to be explicitly set.

A voltage domain is an independently controllable voltage supply being
provided to section of the design. Thus, if you wish to perform
dynamic voltage scaling on a CPU, its clock domain should be
associated with a separate voltage domain.

The current implementation of the voltage domain does not take into
consideration cases where there are derived voltage domains running at
ratio of native voltage domains, as with the case where there can be
on-chip buck/boost (charge pumps) voltage regulation logic.

The regression and configuration scripts are updated with a generic
voltage domain for the system, and one for the CPUs.
9826:014ff1fbff6d Mon Aug 19 03:52:00 EDT 2013 Andreas Hansson <andreas.hansson@arm.com> config: Move the memory instantiation outside FSConfig

This patch moves the instantiation of the memory controller outside
FSConfig and instead relies on the mem_ranges to pass the information
to the caller (e.g. fs.py or one of the regression scripts). The main
motivation for this change is to expose the structural composition of
the memory system and allow more tuning and configuration without
adding a large number of options to the makeSystem functions.

The patch updates the relevant example scripts to maintain the current
functionality. As the order that ports are connected to the memory bus
changes (in certain regresisons), some bus stats are shuffled
around. For example, what used to be layer 0 is now layer 1.

Going forward, options will be added to support the addition of
multi-channel memory controllers.
/gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/
H A Dmove.py6706:ea20065f6614 Fri Oct 30 15:52:00 EDT 2009 Vince Weaver <vince@csl.cornell.edu> X86: Implement movd_Vo_Edp on X86

This patch implements the movd_Vo_Edp series of instructions.

It addresses various concerns by Gabe Black about which file the
instruction belonged in, as well as supporting REX prefixed
instructions properly.

This instruction is needed for some of the spec2k benchmarks, most
notably bzip2.
5540:bf358d99eff7 Wed Sep 03 00:52:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Fix the microcode for sign/zero extending moves that use high byte registers.
5433:1b0b8e9ba6a9 Thu Jun 12 00:52:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Change how segment loading is performed.
/gem5/tests/long/se/10.mcf/ref/sparc/linux/simple-timing/
H A Dstats.txt11960:c7bf1b698ccd Wed Mar 29 19:14:00 EDT 2017 Gabe Black <gabeblack@google.com> stats: Update some stats after simulated program exit behavior was changed.

The following CL delayed program exit and changed the stats for many if not
most of the SE mode regressions.

commit 2c1286865fc2542a0586ca4ff40b00765d17b348
Author: Brandon Potter <Brandon.Potter@amd.com>
Date: Wed Mar 1 14:52:23 2017 -0600

syscall-emul: Rewrite system call exit code

Change-Id: Id241f2b7d5374947597c715ee44febe1acc5ea16
Reviewed-on: https://gem5-review.googlesource.com/2656
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
9838:43d22d746e7a Mon Aug 19 03:52:00 EDT 2013 Andreas Hansson <andreas.hansson@arm.com> stats: Cumulative stats update

This patch updates the stats to reflect the: 1) addition of the
internal queue in SimpleMemory, 2) moving of the memory class outside
FSConfig, 3) fixing up of the 2D vector printing format, 4) specifying
burst size and interface width for the DRAM instead of relying on
cache-line size, 5) performing merging in the DRAM controller write
buffer, and 6) fixing how idle cycles are counted in the atomic and
timing CPU models.

The main reason for bundling them up is to minimise the changeset
size.
8983:8800b05e1cb3 Wed May 09 14:52:00 EDT 2012 Nathan Binkert <nate@binkert.org> stats: update stats for no_value -> nan
Lots of accumulated older changes too.
/gem5/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/
H A Dstats.txt11960:c7bf1b698ccd Wed Mar 29 19:14:00 EDT 2017 Gabe Black <gabeblack@google.com> stats: Update some stats after simulated program exit behavior was changed.

The following CL delayed program exit and changed the stats for many if not
most of the SE mode regressions.

commit 2c1286865fc2542a0586ca4ff40b00765d17b348
Author: Brandon Potter <Brandon.Potter@amd.com>
Date: Wed Mar 1 14:52:23 2017 -0600

syscall-emul: Rewrite system call exit code

Change-Id: Id241f2b7d5374947597c715ee44febe1acc5ea16
Reviewed-on: https://gem5-review.googlesource.com/2656
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
9838:43d22d746e7a Mon Aug 19 03:52:00 EDT 2013 Andreas Hansson <andreas.hansson@arm.com> stats: Cumulative stats update

This patch updates the stats to reflect the: 1) addition of the
internal queue in SimpleMemory, 2) moving of the memory class outside
FSConfig, 3) fixing up of the 2D vector printing format, 4) specifying
burst size and interface width for the DRAM instead of relying on
cache-line size, 5) performing merging in the DRAM controller write
buffer, and 6) fixing how idle cycles are counted in the atomic and
timing CPU models.

The main reason for bundling them up is to minimise the changeset
size.
8983:8800b05e1cb3 Wed May 09 14:52:00 EDT 2012 Nathan Binkert <nate@binkert.org> stats: update stats for no_value -> nan
Lots of accumulated older changes too.
/gem5/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/
H A Dstats.txt11960:c7bf1b698ccd Wed Mar 29 19:14:00 EDT 2017 Gabe Black <gabeblack@google.com> stats: Update some stats after simulated program exit behavior was changed.

The following CL delayed program exit and changed the stats for many if not
most of the SE mode regressions.

commit 2c1286865fc2542a0586ca4ff40b00765d17b348
Author: Brandon Potter <Brandon.Potter@amd.com>
Date: Wed Mar 1 14:52:23 2017 -0600

syscall-emul: Rewrite system call exit code

Change-Id: Id241f2b7d5374947597c715ee44febe1acc5ea16
Reviewed-on: https://gem5-review.googlesource.com/2656
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
9838:43d22d746e7a Mon Aug 19 03:52:00 EDT 2013 Andreas Hansson <andreas.hansson@arm.com> stats: Cumulative stats update

This patch updates the stats to reflect the: 1) addition of the
internal queue in SimpleMemory, 2) moving of the memory class outside
FSConfig, 3) fixing up of the 2D vector printing format, 4) specifying
burst size and interface width for the DRAM instead of relying on
cache-line size, 5) performing merging in the DRAM controller write
buffer, and 6) fixing how idle cycles are counted in the atomic and
timing CPU models.

The main reason for bundling them up is to minimise the changeset
size.
8983:8800b05e1cb3 Wed May 09 14:52:00 EDT 2012 Nathan Binkert <nate@binkert.org> stats: update stats for no_value -> nan
Lots of accumulated older changes too.
/gem5/src/arch/arm/linux/
H A Dlinux.hh13537:2441d9a15e3c Wed Jan 09 10:52:00 EST 2019 Andreas Sandberg <andreas.sandberg@arm.com> arch-arm, sim-se: Fix incorrect SP handling in clone

The clone syscall is currently broken on aarch64 since the aarch64
code uses an incorrect SP register. Fix this by storing the new stack
pointer in SP_EL0 instead of R13.

Change-Id: Ie17990b4f359608e3b53e5bf625eca53769a6653
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Cc: Giacomo Travaglini <giacomo.travaglini@arm.com>
Cc: Javier Setoain <javier.setoain@arm.com>
Cc: Brandon Potter <Brandon.Potter@amd.com>
Reviewed-on: https://gem5-review.googlesource.com/c/15436
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Brandon Potter <Brandon.Potter@amd.com>
9146:a61fdbbc1d45 Mon Aug 06 22:52:00 EDT 2012 Marc Orr <marc.orr@gmail.com> syscall emulation: Enabled getrlimit and getrusage for x86.
Added/moved rlimit constants to base linux header file.

This patch is a revised version of Vince Weaver's earlier patch.
9141:593fe25c86a6 Mon Aug 06 19:52:00 EDT 2012 Marc Orr <marc.orr@gmail.com> syscall emulation: Clean up ioctl handling, and implement for x86.

Enable different whitelists for different OS/arch combinations,
since some use the generic Linux definitions only, and others
use definitions inherited from earlier Unix flavors on those
architectures.

Also update x86 function pointers so ioctl is no longer
unimplemented on that platform.

This patch is a revised version of Vince Weaver's earlier patch.
/gem5/system/alpha/h/
H A Drpb.h7977:60051d2262c2 Fri Nov 14 10:52:00 EST 2003 Lisa Hsu <hsul@eecs.umich.edu> Import changeset
/gem5/src/arch/x86/isa/formats/
H A Dmulti.isa4575:d0017efdfa02 Thu Jun 14 16:52:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> Implement a handful more instructions and differentiate macroops based on the operand types they expect.
/gem5/src/cpu/
H A Dfunc_unit.hh2736:98dcdc08884d Fri Jun 16 17:52:00 EDT 2006 Kevin Lim <ktlim@umich.edu> Reorganization to move FuncUnit, FUDesc, and OpDesc out of the encumbered directory and into the normal cpu directory.

src/SConscript:
Split off FuncUnits from old FUPool so I'm not including encumbered code. This was all written by Steve Raasch so it's safe to include in the main tree.
src/cpu/o3/fu_pool.cc:
Include the func unit file that's not in the encumbered directory.
/gem5/src/arch/power/linux/
H A Dlinux.hh9141:593fe25c86a6 Mon Aug 06 19:52:00 EDT 2012 Marc Orr <marc.orr@gmail.com> syscall emulation: Clean up ioctl handling, and implement for x86.

Enable different whitelists for different OS/arch combinations,
since some use the generic Linux definitions only, and others
use definitions inherited from earlier Unix flavors on those
architectures.

Also update x86 function pointers so ioctl is no longer
unimplemented on that platform.

This patch is a revised version of Vince Weaver's earlier patch.
/gem5/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/
H A Dsimout8983:8800b05e1cb3 Wed May 09 14:52:00 EDT 2012 Nathan Binkert <nate@binkert.org> stats: update stats for no_value -> nan
Lots of accumulated older changes too.
/gem5/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/
H A Dsimout8983:8800b05e1cb3 Wed May 09 14:52:00 EDT 2012 Nathan Binkert <nate@binkert.org> stats: update stats for no_value -> nan
Lots of accumulated older changes too.
/gem5/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/
H A Dsimout8983:8800b05e1cb3 Wed May 09 14:52:00 EDT 2012 Nathan Binkert <nate@binkert.org> stats: update stats for no_value -> nan
Lots of accumulated older changes too.
/gem5/tests/quick/se/00.hello/ref/alpha/linux/simple-atomic/
H A Dsimout8983:8800b05e1cb3 Wed May 09 14:52:00 EDT 2012 Nathan Binkert <nate@binkert.org> stats: update stats for no_value -> nan
Lots of accumulated older changes too.
/gem5/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/
H A Dsimout8983:8800b05e1cb3 Wed May 09 14:52:00 EDT 2012 Nathan Binkert <nate@binkert.org> stats: update stats for no_value -> nan
Lots of accumulated older changes too.
/gem5/tests/quick/se/00.hello/ref/mips/linux/simple-atomic/
H A Dsimout8983:8800b05e1cb3 Wed May 09 14:52:00 EDT 2012 Nathan Binkert <nate@binkert.org> stats: update stats for no_value -> nan
Lots of accumulated older changes too.
/gem5/tests/quick/se/00.hello/ref/mips/linux/simple-timing/
H A Dsimout8983:8800b05e1cb3 Wed May 09 14:52:00 EDT 2012 Nathan Binkert <nate@binkert.org> stats: update stats for no_value -> nan
Lots of accumulated older changes too.
/gem5/src/sim/
H A Dsub_system.cc11424:e07fd01651f3 Tue Apr 05 11:52:00 EDT 2016 David Guillen Fandos <david.guillen@arm.com> power: Add support for power models

This patch adds some basic support for power models in gem5.

The power interface is defined so it can interact with thermal
models as well. It implements a simple power evaluator that
can be used for simple power models that express power in the
form of a math expression. These expressions can use stats
within the same SimObject (or down its hierarchy) and some
magic variables such as "temp" for temperature.
In future patches we will extend this functionality to allow
slightly more complex expressions.

The model allows it to be extended to use other kinds of models.

Finally, the thermal model is updated to use the power usage as input.
H A Dsub_system.hh11424:e07fd01651f3 Tue Apr 05 11:52:00 EDT 2016 David Guillen Fandos <david.guillen@arm.com> power: Add support for power models

This patch adds some basic support for power models in gem5.

The power interface is defined so it can interact with thermal
models as well. It implements a simple power evaluator that
can be used for simple power models that express power in the
form of a math expression. These expressions can use stats
within the same SimObject (or down its hierarchy) and some
magic variables such as "temp" for temperature.
In future patches we will extend this functionality to allow
slightly more complex expressions.

The model allows it to be extended to use other kinds of models.

Finally, the thermal model is updated to use the power usage as input.
/gem5/src/sim/power/
H A Dthermal_domain.cc11424:e07fd01651f3 Tue Apr 05 11:52:00 EDT 2016 David Guillen Fandos <david.guillen@arm.com> power: Add support for power models

This patch adds some basic support for power models in gem5.

The power interface is defined so it can interact with thermal
models as well. It implements a simple power evaluator that
can be used for simple power models that express power in the
form of a math expression. These expressions can use stats
within the same SimObject (or down its hierarchy) and some
magic variables such as "temp" for temperature.
In future patches we will extend this functionality to allow
slightly more complex expressions.

The model allows it to be extended to use other kinds of models.

Finally, the thermal model is updated to use the power usage as input.

Completed in 101 milliseconds

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