16019Shines@cs.fsu.edu/* 210850SGiacomo.Gabrielli@arm.com * Copyright (c) 2010, 2011-2012, 2015 ARM Limited 37416SAli.Saidi@ARM.com * All rights reserved 47416SAli.Saidi@ARM.com * 57416SAli.Saidi@ARM.com * The license below extends only to copyright in the software and shall 67416SAli.Saidi@ARM.com * not be construed as granting a license to any other intellectual 77416SAli.Saidi@ARM.com * property including but not limited to intellectual property relating 87416SAli.Saidi@ARM.com * to a hardware implementation of the functionality of the software 97416SAli.Saidi@ARM.com * licensed hereunder. You may use the software subject to the license 107416SAli.Saidi@ARM.com * terms below provided that you ensure that this notice is replicated 117416SAli.Saidi@ARM.com * unmodified and in its entirety in all distributions of the software, 127416SAli.Saidi@ARM.com * modified or unmodified, in source code or in binary form. 137416SAli.Saidi@ARM.com * 146019Shines@cs.fsu.edu * Copyright (c) 2003-2005 The Regents of The University of Michigan 156019Shines@cs.fsu.edu * Copyright (c) 2007-2008 The Florida State University 166019Shines@cs.fsu.edu * All rights reserved. 176019Shines@cs.fsu.edu * 186019Shines@cs.fsu.edu * Redistribution and use in source and binary forms, with or without 196019Shines@cs.fsu.edu * modification, are permitted provided that the following conditions are 206019Shines@cs.fsu.edu * met: redistributions of source code must retain the above copyright 216019Shines@cs.fsu.edu * notice, this list of conditions and the following disclaimer; 226019Shines@cs.fsu.edu * redistributions in binary form must reproduce the above copyright 236019Shines@cs.fsu.edu * notice, this list of conditions and the following disclaimer in the 246019Shines@cs.fsu.edu * documentation and/or other materials provided with the distribution; 256019Shines@cs.fsu.edu * neither the name of the copyright holders nor the names of its 266019Shines@cs.fsu.edu * contributors may be used to endorse or promote products derived from 276019Shines@cs.fsu.edu * this software without specific prior written permission. 286019Shines@cs.fsu.edu * 296019Shines@cs.fsu.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 306019Shines@cs.fsu.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 316019Shines@cs.fsu.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 326019Shines@cs.fsu.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 336019Shines@cs.fsu.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 346019Shines@cs.fsu.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 356019Shines@cs.fsu.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 366019Shines@cs.fsu.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 376019Shines@cs.fsu.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 386019Shines@cs.fsu.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 396019Shines@cs.fsu.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 406019Shines@cs.fsu.edu * 417416SAli.Saidi@ARM.com * Authors: Ali Saidi 427416SAli.Saidi@ARM.com * Stephen Hines 436019Shines@cs.fsu.edu */ 446019Shines@cs.fsu.edu 456019Shines@cs.fsu.edu#ifndef __ARCH_ARM_LINUX_LINUX_HH__ 466019Shines@cs.fsu.edu#define __ARCH_ARM_LINUX_LINUX_HH__ 476019Shines@cs.fsu.edu 4813536Sandreas.sandberg@arm.com#include "arch/arm/utility.hh" 496019Shines@cs.fsu.edu#include "kern/linux/linux.hh" 506019Shines@cs.fsu.edu 5113536Sandreas.sandberg@arm.comclass ArmLinux : public Linux 5213536Sandreas.sandberg@arm.com{ 5313536Sandreas.sandberg@arm.com public: 5413536Sandreas.sandberg@arm.com static void 5513536Sandreas.sandberg@arm.com archClone(uint64_t flags, 5613536Sandreas.sandberg@arm.com Process *pp, Process *cp, 5713536Sandreas.sandberg@arm.com ThreadContext *ptc, ThreadContext *ctc, 5813536Sandreas.sandberg@arm.com uint64_t stack, uint64_t tls) 5913536Sandreas.sandberg@arm.com { 6013536Sandreas.sandberg@arm.com ArmISA::copyRegs(ptc, ctc); 6113538Sandreas.sandberg@arm.com 6213538Sandreas.sandberg@arm.com if (flags & TGT_CLONE_SETTLS) { 6313538Sandreas.sandberg@arm.com /* TPIDR_EL0 is architecturally mapped to TPIDRURW, so 6413538Sandreas.sandberg@arm.com * this works for both aarch32 and aarch64. */ 6513538Sandreas.sandberg@arm.com ctc->setMiscReg(ArmISA::MISCREG_TPIDR_EL0, tls); 6613538Sandreas.sandberg@arm.com } 6713536Sandreas.sandberg@arm.com } 6813536Sandreas.sandberg@arm.com}; 6913536Sandreas.sandberg@arm.com 7013536Sandreas.sandberg@arm.comclass ArmLinux32 : public ArmLinux 716019Shines@cs.fsu.edu{ 726019Shines@cs.fsu.edu public: 736019Shines@cs.fsu.edu 7411382Sbrandon.potter@amd.com static const int TGT_SIGHUP = 0x000001; 7511382Sbrandon.potter@amd.com static const int TGT_SIGINT = 0x000002; 7611382Sbrandon.potter@amd.com static const int TGT_SIGQUIT = 0x000003; 7711382Sbrandon.potter@amd.com static const int TGT_SIGILL = 0x000004; 7811382Sbrandon.potter@amd.com static const int TGT_SIGTRAP = 0x000005; 7911382Sbrandon.potter@amd.com static const int TGT_SIGABRT = 0x000006; 8011382Sbrandon.potter@amd.com static const int TGT_SIGIOT = 0x000006; 8111382Sbrandon.potter@amd.com static const int TGT_SIGBUS = 0x000007; 8211382Sbrandon.potter@amd.com static const int TGT_SIGFPE = 0x000008; 8311382Sbrandon.potter@amd.com static const int TGT_SIGKILL = 0x000009; 8411382Sbrandon.potter@amd.com static const int TGT_SIGUSR1 = 0x00000a; 8511382Sbrandon.potter@amd.com static const int TGT_SIGSEGV = 0x00000b; 8611382Sbrandon.potter@amd.com static const int TGT_SIGUSR2 = 0x00000c; 8711382Sbrandon.potter@amd.com static const int TGT_SIGPIPE = 0x00000d; 8811382Sbrandon.potter@amd.com static const int TGT_SIGALRM = 0x00000e; 8911382Sbrandon.potter@amd.com static const int TGT_SIGTERM = 0x00000f; 9011382Sbrandon.potter@amd.com static const int TGT_SIGSTKFLT = 0x000010; 9111382Sbrandon.potter@amd.com static const int TGT_SIGCHLD = 0x000011; 9211382Sbrandon.potter@amd.com static const int TGT_SIGCONT = 0x000012; 9311382Sbrandon.potter@amd.com static const int TGT_SIGSTOP = 0x000013; 9411382Sbrandon.potter@amd.com static const int TGT_SIGTSTP = 0x000014; 9511382Sbrandon.potter@amd.com static const int TGT_SIGTTIN = 0x000015; 9611382Sbrandon.potter@amd.com static const int TGT_SIGTTOU = 0x000016; 9711382Sbrandon.potter@amd.com static const int TGT_SIGURG = 0x000017; 9811382Sbrandon.potter@amd.com static const int TGT_SIGXCPU = 0x000018; 9911382Sbrandon.potter@amd.com static const int TGT_SIGXFSZ = 0x000019; 10011382Sbrandon.potter@amd.com static const int TGT_SIGVTALRM = 0x00001a; 10111382Sbrandon.potter@amd.com static const int TGT_SIGPROF = 0x00001b; 10211382Sbrandon.potter@amd.com static const int TGT_SIGWINCH = 0x00001c; 10311382Sbrandon.potter@amd.com static const int TGT_SIGIO = 0x00001d; 10411382Sbrandon.potter@amd.com static const int TGT_SIGPOLL = 0x00001d; 10511382Sbrandon.potter@amd.com static const int TGT_SIGPWR = 0x00001e; 10611382Sbrandon.potter@amd.com static const int TGT_SIGSYS = 0x00001f; 10711382Sbrandon.potter@amd.com static const int TGT_SIGUNUSED = 0x00001f; 10811382Sbrandon.potter@amd.com 1096019Shines@cs.fsu.edu /// This table maps the target open() flags to the corresponding 1106019Shines@cs.fsu.edu /// host open() flags. 11111381Sbrandon.potter@amd.com static SyscallFlagTransTable openFlagTable[]; 1126019Shines@cs.fsu.edu 1136019Shines@cs.fsu.edu /// Number of entries in openFlagTable[]. 1146019Shines@cs.fsu.edu static const int NUM_OPEN_FLAGS; 1156019Shines@cs.fsu.edu 1166019Shines@cs.fsu.edu //@{ 1177416SAli.Saidi@ARM.com /// Basic ARM Linux types 1187416SAli.Saidi@ARM.com typedef uint32_t size_t; 1197416SAli.Saidi@ARM.com typedef uint32_t off_t; 1207416SAli.Saidi@ARM.com typedef int32_t time_t; 1217416SAli.Saidi@ARM.com typedef int32_t clock_t; 1227416SAli.Saidi@ARM.com //@} 1237416SAli.Saidi@ARM.com 1247416SAli.Saidi@ARM.com //@{ 1256019Shines@cs.fsu.edu /// open(2) flag values. 12611382Sbrandon.potter@amd.com static const int TGT_O_RDONLY = 000000000; //!< O_RDONLY 12711382Sbrandon.potter@amd.com static const int TGT_O_WRONLY = 000000001; //!< O_WRONLY 12811382Sbrandon.potter@amd.com static const int TGT_O_RDWR = 000000002; //!< O_RDWR 12911382Sbrandon.potter@amd.com static const int TGT_O_CREAT = 000000100; //!< O_CREAT 13011382Sbrandon.potter@amd.com static const int TGT_O_EXCL = 000000200; //!< O_EXCL 13111382Sbrandon.potter@amd.com static const int TGT_O_NOCTTY = 000000400; //!< O_NOCTTY 13211382Sbrandon.potter@amd.com static const int TGT_O_TRUNC = 000001000; //!< O_TRUNC 13311382Sbrandon.potter@amd.com static const int TGT_O_APPEND = 000002000; //!< O_APPEND 13411382Sbrandon.potter@amd.com static const int TGT_O_NONBLOCK = 000004000; //!< O_NONBLOCK 13511382Sbrandon.potter@amd.com static const int TGT_O_DSYNC = 000010000; //!< O_DSYNC 13611382Sbrandon.potter@amd.com static const int TGT_FASYNC = 000020000; //!< FASYNC 13711382Sbrandon.potter@amd.com static const int TGT_O_DIRECT = 000200000; //!< O_DIRECT 13811382Sbrandon.potter@amd.com static const int TGT_O_LARGEFILE = 000400000; //!< O_LARGEFILE 13911382Sbrandon.potter@amd.com static const int TGT_O_DIRECTORY = 000040000; //!< O_DIRECTORY 14011382Sbrandon.potter@amd.com static const int TGT_O_NOFOLLOW = 000100000; //!< O_NOFOLLOW 14111382Sbrandon.potter@amd.com static const int TGT_O_NOATIME = 001000000; //!< O_NOATIME 14211382Sbrandon.potter@amd.com static const int TGT_O_CLOEXEC = 002000000; //!< O_NOATIME 14311382Sbrandon.potter@amd.com static const int TGT_O_SYNC = 004010000; //!< O_SYNC 14411382Sbrandon.potter@amd.com static const int TGT_O_PATH = 010000000; //!< O_PATH 1456019Shines@cs.fsu.edu //@} 1466019Shines@cs.fsu.edu 14711383Sbrandon.potter@amd.com static const unsigned TGT_MAP_SHARED = 0x00001; 14811383Sbrandon.potter@amd.com static const unsigned TGT_MAP_PRIVATE = 0x00002; 14911383Sbrandon.potter@amd.com static const unsigned TGT_MAP_ANON = 0x00020; 15011383Sbrandon.potter@amd.com static const unsigned TGT_MAP_DENYWRITE = 0x00800; 15111383Sbrandon.potter@amd.com static const unsigned TGT_MAP_EXECUTABLE = 0x01000; 15211383Sbrandon.potter@amd.com static const unsigned TGT_MAP_FILE = 0x00000; 15311383Sbrandon.potter@amd.com static const unsigned TGT_MAP_GROWSDOWN = 0x00100; 15411383Sbrandon.potter@amd.com static const unsigned TGT_MAP_HUGETLB = 0x40000; 15511383Sbrandon.potter@amd.com static const unsigned TGT_MAP_LOCKED = 0x02000; 15611383Sbrandon.potter@amd.com static const unsigned TGT_MAP_NONBLOCK = 0x10000; 15711383Sbrandon.potter@amd.com static const unsigned TGT_MAP_NORESERVE = 0x04000; 15811383Sbrandon.potter@amd.com static const unsigned TGT_MAP_POPULATE = 0x08000; 15911383Sbrandon.potter@amd.com static const unsigned TGT_MAP_STACK = 0x20000; 16011383Sbrandon.potter@amd.com static const unsigned TGT_MAP_ANONYMOUS = 0x00020; 16111383Sbrandon.potter@amd.com static const unsigned TGT_MAP_FIXED = 0x00010; 16211383Sbrandon.potter@amd.com 16311383Sbrandon.potter@amd.com static const unsigned NUM_MMAP_FLAGS; 1646019Shines@cs.fsu.edu 1656019Shines@cs.fsu.edu /// For table(). 1666019Shines@cs.fsu.edu static const int TBL_SYSINFO = 12; 1676019Shines@cs.fsu.edu 1687416SAli.Saidi@ARM.com /// Limit struct for getrlimit/setrlimit. 1697416SAli.Saidi@ARM.com struct rlimit { 1707416SAli.Saidi@ARM.com uint32_t rlim_cur; //!< soft limit 1717416SAli.Saidi@ARM.com uint32_t rlim_max; //!< hard limit 1727416SAli.Saidi@ARM.com }; 1737416SAli.Saidi@ARM.com 1747416SAli.Saidi@ARM.com /// For gettimeofday(). 1757416SAli.Saidi@ARM.com struct timeval { 1767416SAli.Saidi@ARM.com int32_t tv_sec; //!< seconds 1777416SAli.Saidi@ARM.com int32_t tv_usec; //!< microseconds 1787416SAli.Saidi@ARM.com }; 1797416SAli.Saidi@ARM.com 18010850SGiacomo.Gabrielli@arm.com struct timespec { 18110850SGiacomo.Gabrielli@arm.com int32_t tv_sec; //!< seconds 18210850SGiacomo.Gabrielli@arm.com int32_t tv_nsec; //!< nanoseconds 18310850SGiacomo.Gabrielli@arm.com }; 18410850SGiacomo.Gabrielli@arm.com 1857416SAli.Saidi@ARM.com // For writev/readv 1867416SAli.Saidi@ARM.com struct tgt_iovec { 1877416SAli.Saidi@ARM.com uint32_t iov_base; // void * 1887416SAli.Saidi@ARM.com uint32_t iov_len; 1897416SAli.Saidi@ARM.com }; 1907416SAli.Saidi@ARM.com 1917416SAli.Saidi@ARM.com 1926395Ssaidi@eecs.umich.edu typedef struct { 1936395Ssaidi@eecs.umich.edu uint32_t st_dev; 1946395Ssaidi@eecs.umich.edu uint32_t st_ino; 1956395Ssaidi@eecs.umich.edu uint16_t st_mode; 1966395Ssaidi@eecs.umich.edu uint16_t st_nlink; 1976395Ssaidi@eecs.umich.edu uint16_t st_uid; 1986395Ssaidi@eecs.umich.edu uint16_t st_gid; 1996395Ssaidi@eecs.umich.edu uint32_t st_rdev; 20010037SARM gem5 Developers uint32_t __pad1; 2016395Ssaidi@eecs.umich.edu uint32_t st_size; 2026395Ssaidi@eecs.umich.edu uint32_t st_blksize; 20310037SARM gem5 Developers uint32_t __pad2; 2046395Ssaidi@eecs.umich.edu uint32_t st_blocks; 2056395Ssaidi@eecs.umich.edu uint32_t st_atimeX; 2066395Ssaidi@eecs.umich.edu uint32_t st_atime_nsec; 2076395Ssaidi@eecs.umich.edu uint32_t st_mtimeX; 2086395Ssaidi@eecs.umich.edu uint32_t st_mtime_nsec; 2096395Ssaidi@eecs.umich.edu uint32_t st_ctimeX; 2106395Ssaidi@eecs.umich.edu uint32_t st_ctime_nsec; 2116395Ssaidi@eecs.umich.edu } tgt_stat; 2126395Ssaidi@eecs.umich.edu 2136395Ssaidi@eecs.umich.edu typedef struct { 2146395Ssaidi@eecs.umich.edu uint64_t st_dev; 2156395Ssaidi@eecs.umich.edu uint8_t __pad0[4]; 2166395Ssaidi@eecs.umich.edu uint32_t __st_ino; 2176395Ssaidi@eecs.umich.edu uint32_t st_mode; 2186395Ssaidi@eecs.umich.edu uint32_t st_nlink; 2196395Ssaidi@eecs.umich.edu uint32_t st_uid; 2206395Ssaidi@eecs.umich.edu uint32_t st_gid; 2216395Ssaidi@eecs.umich.edu uint64_t st_rdev; 2226395Ssaidi@eecs.umich.edu uint8_t __pad3[4]; 2236395Ssaidi@eecs.umich.edu int64_t __attribute__ ((aligned (8))) st_size; 2246395Ssaidi@eecs.umich.edu uint32_t st_blksize; 2256395Ssaidi@eecs.umich.edu uint64_t __attribute__ ((aligned (8))) st_blocks; 2266395Ssaidi@eecs.umich.edu uint32_t st_atimeX; 2276395Ssaidi@eecs.umich.edu uint32_t st_atime_nsec; 2286395Ssaidi@eecs.umich.edu uint32_t st_mtimeX; 2296395Ssaidi@eecs.umich.edu uint32_t st_mtime_nsec; 2306395Ssaidi@eecs.umich.edu uint32_t st_ctimeX; 2316395Ssaidi@eecs.umich.edu uint32_t st_ctime_nsec; 2326395Ssaidi@eecs.umich.edu uint64_t st_ino; 2336395Ssaidi@eecs.umich.edu } tgt_stat64; 2346395Ssaidi@eecs.umich.edu 2356640Svince@csl.cornell.edu typedef struct { 2366640Svince@csl.cornell.edu int32_t uptime; /* Seconds since boot */ 2376640Svince@csl.cornell.edu uint32_t loads[3]; /* 1, 5, and 15 minute load averages */ 2386640Svince@csl.cornell.edu uint32_t totalram; /* Total usable main memory size */ 2396640Svince@csl.cornell.edu uint32_t freeram; /* Available memory size */ 2406640Svince@csl.cornell.edu uint32_t sharedram; /* Amount of shared memory */ 2416640Svince@csl.cornell.edu uint32_t bufferram; /* Memory used by buffers */ 2426640Svince@csl.cornell.edu uint32_t totalswap; /* Total swap space size */ 2436640Svince@csl.cornell.edu uint32_t freeswap; /* swap space still available */ 2446640Svince@csl.cornell.edu uint16_t procs; /* Number of current processes */ 2456640Svince@csl.cornell.edu uint32_t totalhigh; /* Total high memory size */ 2466640Svince@csl.cornell.edu uint32_t freehigh; /* Available high memory size */ 2476640Svince@csl.cornell.edu uint32_t mem_unit; /* Memory unit size in bytes */ 2486640Svince@csl.cornell.edu } tgt_sysinfo; 24911320Ssteve.reinhardt@amd.com 2507416SAli.Saidi@ARM.com /// For getrusage(). 2517416SAli.Saidi@ARM.com struct rusage { 2527416SAli.Saidi@ARM.com struct timeval ru_utime; //!< user time used 2537416SAli.Saidi@ARM.com struct timeval ru_stime; //!< system time used 2547416SAli.Saidi@ARM.com int32_t ru_maxrss; //!< max rss 2557416SAli.Saidi@ARM.com int32_t ru_ixrss; //!< integral shared memory size 2567416SAli.Saidi@ARM.com int32_t ru_idrss; //!< integral unshared data " 2577416SAli.Saidi@ARM.com int32_t ru_isrss; //!< integral unshared stack " 2587416SAli.Saidi@ARM.com int32_t ru_minflt; //!< page reclaims - total vmfaults 2597416SAli.Saidi@ARM.com int32_t ru_majflt; //!< page faults 2607416SAli.Saidi@ARM.com int32_t ru_nswap; //!< swaps 2617416SAli.Saidi@ARM.com int32_t ru_inblock; //!< block input operations 2627416SAli.Saidi@ARM.com int32_t ru_oublock; //!< block output operations 2637416SAli.Saidi@ARM.com int32_t ru_msgsnd; //!< messages sent 2647416SAli.Saidi@ARM.com int32_t ru_msgrcv; //!< messages received 2657416SAli.Saidi@ARM.com int32_t ru_nsignals; //!< signals received 2667416SAli.Saidi@ARM.com int32_t ru_nvcsw; //!< voluntary context switches 2677416SAli.Saidi@ARM.com int32_t ru_nivcsw; //!< involuntary " 2687416SAli.Saidi@ARM.com }; 2697416SAli.Saidi@ARM.com 2707416SAli.Saidi@ARM.com /// For times(). 2717416SAli.Saidi@ARM.com struct tms { 2727416SAli.Saidi@ARM.com int32_t tms_utime; //!< user time 2737416SAli.Saidi@ARM.com int32_t tms_stime; //!< system time 2747416SAli.Saidi@ARM.com int32_t tms_cutime; //!< user time of children 2757416SAli.Saidi@ARM.com int32_t tms_cstime; //!< system time of children 2767416SAli.Saidi@ARM.com }; 27713537Sandreas.sandberg@arm.com 27813537Sandreas.sandberg@arm.com static void 27913537Sandreas.sandberg@arm.com archClone(uint64_t flags, 28013537Sandreas.sandberg@arm.com Process *pp, Process *cp, 28113537Sandreas.sandberg@arm.com ThreadContext *ptc, ThreadContext *ctc, 28213537Sandreas.sandberg@arm.com uint64_t stack, uint64_t tls) 28313537Sandreas.sandberg@arm.com { 28413537Sandreas.sandberg@arm.com ArmLinux::archClone(flags, pp, cp, ptc, ctc, stack, tls); 28513537Sandreas.sandberg@arm.com 28613537Sandreas.sandberg@arm.com if (stack) 28713537Sandreas.sandberg@arm.com ctc->setIntReg(ArmISA::INTREG_SP, stack); 28813537Sandreas.sandberg@arm.com } 28910037SARM gem5 Developers}; 2907416SAli.Saidi@ARM.com 29113536Sandreas.sandberg@arm.comclass ArmLinux64 : public ArmLinux 29210037SARM gem5 Developers{ 29310037SARM gem5 Developers public: 2946395Ssaidi@eecs.umich.edu 29511382Sbrandon.potter@amd.com static const int TGT_SIGHUP = 0x000001; 29611382Sbrandon.potter@amd.com static const int TGT_SIGINT = 0x000002; 29711382Sbrandon.potter@amd.com static const int TGT_SIGQUIT = 0x000003; 29811382Sbrandon.potter@amd.com static const int TGT_SIGILL = 0x000004; 29911382Sbrandon.potter@amd.com static const int TGT_SIGTRAP = 0x000005; 30011382Sbrandon.potter@amd.com static const int TGT_SIGABRT = 0x000006; 30111382Sbrandon.potter@amd.com static const int TGT_SIGIOT = 0x000006; 30211382Sbrandon.potter@amd.com static const int TGT_SIGBUS = 0x000007; 30311382Sbrandon.potter@amd.com static const int TGT_SIGFPE = 0x000008; 30411382Sbrandon.potter@amd.com static const int TGT_SIGKILL = 0x000009; 30511382Sbrandon.potter@amd.com static const int TGT_SIGUSR1 = 0x00000a; 30611382Sbrandon.potter@amd.com static const int TGT_SIGSEGV = 0x00000b; 30711382Sbrandon.potter@amd.com static const int TGT_SIGUSR2 = 0x00000c; 30811382Sbrandon.potter@amd.com static const int TGT_SIGPIPE = 0x00000d; 30911382Sbrandon.potter@amd.com static const int TGT_SIGALRM = 0x00000e; 31011382Sbrandon.potter@amd.com static const int TGT_SIGTERM = 0x00000f; 31111382Sbrandon.potter@amd.com static const int TGT_SIGSTKFLT = 0x000010; 31211382Sbrandon.potter@amd.com static const int TGT_SIGCHLD = 0x000011; 31311382Sbrandon.potter@amd.com static const int TGT_SIGCONT = 0x000012; 31411382Sbrandon.potter@amd.com static const int TGT_SIGSTOP = 0x000013; 31511382Sbrandon.potter@amd.com static const int TGT_SIGTSTP = 0x000014; 31611382Sbrandon.potter@amd.com static const int TGT_SIGTTIN = 0x000015; 31711382Sbrandon.potter@amd.com static const int TGT_SIGTTOU = 0x000016; 31811382Sbrandon.potter@amd.com static const int TGT_SIGURG = 0x000017; 31911382Sbrandon.potter@amd.com static const int TGT_SIGXCPU = 0x000018; 32011382Sbrandon.potter@amd.com static const int TGT_SIGXFSZ = 0x000019; 32111382Sbrandon.potter@amd.com static const int TGT_SIGVTALRM = 0x00001a; 32211382Sbrandon.potter@amd.com static const int TGT_SIGPROF = 0x00001b; 32311382Sbrandon.potter@amd.com static const int TGT_SIGWINCH = 0x00001c; 32411382Sbrandon.potter@amd.com static const int TGT_SIGIO = 0x00001d; 32511382Sbrandon.potter@amd.com static const int TGT_SIGPOLL = 0x00001d; 32611382Sbrandon.potter@amd.com static const int TGT_SIGPWR = 0x00001e; 32711382Sbrandon.potter@amd.com static const int TGT_SIGSYS = 0x00001f; 32811382Sbrandon.potter@amd.com static const int TGT_SIGUNUSED = 0x00001f; 32911382Sbrandon.potter@amd.com 33010037SARM gem5 Developers /// This table maps the target open() flags to the corresponding 33110037SARM gem5 Developers /// host open() flags. 33211381Sbrandon.potter@amd.com static SyscallFlagTransTable openFlagTable[]; 33310037SARM gem5 Developers 33410037SARM gem5 Developers /// Number of entries in openFlagTable[]. 33510037SARM gem5 Developers static const int NUM_OPEN_FLAGS; 33610037SARM gem5 Developers 33710037SARM gem5 Developers //@{ 33810037SARM gem5 Developers /// Basic ARM Linux types 33910037SARM gem5 Developers typedef uint64_t size_t; 34010037SARM gem5 Developers typedef uint64_t off_t; 34110037SARM gem5 Developers typedef int64_t time_t; 34210037SARM gem5 Developers typedef int64_t clock_t; 34310037SARM gem5 Developers //@} 34410037SARM gem5 Developers 34510037SARM gem5 Developers //@{ 34610037SARM gem5 Developers /// open(2) flag values. 34711382Sbrandon.potter@amd.com static const int TGT_O_RDONLY = 000000000; //!< O_RDONLY 34811382Sbrandon.potter@amd.com static const int TGT_O_WRONLY = 000000001; //!< O_WRONLY 34911382Sbrandon.potter@amd.com static const int TGT_O_RDWR = 000000002; //!< O_RDWR 35011382Sbrandon.potter@amd.com static const int TGT_O_CREAT = 000000100; //!< O_CREAT 35111382Sbrandon.potter@amd.com static const int TGT_O_EXCL = 000000200; //!< O_EXCL 35211382Sbrandon.potter@amd.com static const int TGT_O_NOCTTY = 000000400; //!< O_NOCTTY 35311382Sbrandon.potter@amd.com static const int TGT_O_TRUNC = 000001000; //!< O_TRUNC 35411382Sbrandon.potter@amd.com static const int TGT_O_APPEND = 000002000; //!< O_APPEND 35511382Sbrandon.potter@amd.com static const int TGT_O_NONBLOCK = 000004000; //!< O_NONBLOCK 35611382Sbrandon.potter@amd.com static const int TGT_O_DSYNC = 000010000; //!< O_DSYNC 35711382Sbrandon.potter@amd.com static const int TGT_FASYNC = 000020000; //!< FASYNC 35811382Sbrandon.potter@amd.com static const int TGT_O_DIRECT = 000200000; //!< O_DIRECT 35911382Sbrandon.potter@amd.com static const int TGT_O_LARGEFILE = 000400000; //!< O_LARGEFILE 36011382Sbrandon.potter@amd.com static const int TGT_O_DIRECTORY = 000040000; //!< O_DIRECTORY 36111382Sbrandon.potter@amd.com static const int TGT_O_NOFOLLOW = 000100000; //!< O_NOFOLLOW 36211382Sbrandon.potter@amd.com static const int TGT_O_NOATIME = 001000000; //!< O_NOATIME 36311382Sbrandon.potter@amd.com static const int TGT_O_CLOEXEC = 002000000; //!< O_NOATIME 36411382Sbrandon.potter@amd.com static const int TGT_O_SYNC = 004010000; //!< O_SYNC 36511382Sbrandon.potter@amd.com static const int TGT_O_PATH = 010000000; //!< O_PATH 36610037SARM gem5 Developers //@} 36710037SARM gem5 Developers 36810037SARM gem5 Developers /// For mmap(). 36911383Sbrandon.potter@amd.com static SyscallFlagTransTable mmapFlagTable[]; 37011383Sbrandon.potter@amd.com 37111383Sbrandon.potter@amd.com static const unsigned TGT_MAP_SHARED = 0x00001; 37211383Sbrandon.potter@amd.com static const unsigned TGT_MAP_PRIVATE = 0x00002; 37311383Sbrandon.potter@amd.com static const unsigned TGT_MAP_ANON = 0x00020; 37411383Sbrandon.potter@amd.com static const unsigned TGT_MAP_DENYWRITE = 0x00800; 37511383Sbrandon.potter@amd.com static const unsigned TGT_MAP_EXECUTABLE = 0x01000; 37611383Sbrandon.potter@amd.com static const unsigned TGT_MAP_FILE = 0x00000; 37711383Sbrandon.potter@amd.com static const unsigned TGT_MAP_GROWSDOWN = 0x00100; 37811383Sbrandon.potter@amd.com static const unsigned TGT_MAP_HUGETLB = 0x40000; 37911383Sbrandon.potter@amd.com static const unsigned TGT_MAP_LOCKED = 0x02000; 38011383Sbrandon.potter@amd.com static const unsigned TGT_MAP_NONBLOCK = 0x10000; 38111383Sbrandon.potter@amd.com static const unsigned TGT_MAP_NORESERVE = 0x04000; 38211383Sbrandon.potter@amd.com static const unsigned TGT_MAP_POPULATE = 0x08000; 38311383Sbrandon.potter@amd.com static const unsigned TGT_MAP_STACK = 0x20000; 38411383Sbrandon.potter@amd.com static const unsigned TGT_MAP_ANONYMOUS = 0x00020; 38511383Sbrandon.potter@amd.com static const unsigned TGT_MAP_FIXED = 0x00010; 38611383Sbrandon.potter@amd.com 38711383Sbrandon.potter@amd.com static const unsigned NUM_MMAP_FLAGS; 38810037SARM gem5 Developers 38910037SARM gem5 Developers //@{ 39010037SARM gem5 Developers /// For getrusage(). 39110037SARM gem5 Developers static const int TGT_RUSAGE_SELF = 0; 39210037SARM gem5 Developers static const int TGT_RUSAGE_CHILDREN = -1; 39310037SARM gem5 Developers static const int TGT_RUSAGE_BOTH = -2; 39410037SARM gem5 Developers //@} 39510037SARM gem5 Developers 39610037SARM gem5 Developers //@{ 39710037SARM gem5 Developers /// ioctl() command codes. 39810037SARM gem5 Developers static const unsigned TIOCGETP_ = 0x5401; 39910037SARM gem5 Developers static const unsigned TIOCSETP_ = 0x80067409; 40010037SARM gem5 Developers static const unsigned TIOCSETN_ = 0x8006740a; 40110037SARM gem5 Developers static const unsigned TIOCSETC_ = 0x80067411; 40210037SARM gem5 Developers static const unsigned TIOCGETC_ = 0x40067412; 40310037SARM gem5 Developers static const unsigned FIONREAD_ = 0x4004667f; 40410037SARM gem5 Developers static const unsigned TIOCISATTY_ = 0x2000745e; 40510037SARM gem5 Developers static const unsigned TIOCGETS_ = 0x402c7413; 40610037SARM gem5 Developers static const unsigned TIOCGETA_ = 0x5405; 40710037SARM gem5 Developers static const unsigned TCSETAW_ = 0x5407; // 2.6.15 kernel 40810037SARM gem5 Developers //@} 40910037SARM gem5 Developers 41010037SARM gem5 Developers /// For table(). 41110037SARM gem5 Developers static const int TBL_SYSINFO = 12; 41210037SARM gem5 Developers 41310037SARM gem5 Developers /// Resource enumeration for getrlimit(). 41410037SARM gem5 Developers enum rlimit_resources { 41510037SARM gem5 Developers TGT_RLIMIT_CPU = 0, 41610037SARM gem5 Developers TGT_RLIMIT_FSIZE = 1, 41710037SARM gem5 Developers TGT_RLIMIT_DATA = 2, 41810037SARM gem5 Developers TGT_RLIMIT_STACK = 3, 41910037SARM gem5 Developers TGT_RLIMIT_CORE = 4, 42010037SARM gem5 Developers TGT_RLIMIT_RSS = 5, 42110037SARM gem5 Developers TGT_RLIMIT_NPROC = 6, 42210037SARM gem5 Developers TGT_RLIMIT_NOFILE = 7, 42310037SARM gem5 Developers TGT_RLIMIT_MEMLOCK = 8, 42410037SARM gem5 Developers TGT_RLIMIT_AS = 9, 42510037SARM gem5 Developers TGT_RLIMIT_LOCKS = 10 42610037SARM gem5 Developers }; 42710037SARM gem5 Developers 42810037SARM gem5 Developers /// Limit struct for getrlimit/setrlimit. 42910037SARM gem5 Developers struct rlimit { 43010037SARM gem5 Developers uint64_t rlim_cur; //!< soft limit 43110037SARM gem5 Developers uint64_t rlim_max; //!< hard limit 43210037SARM gem5 Developers }; 43310037SARM gem5 Developers 43410037SARM gem5 Developers /// For gettimeofday(). 43510037SARM gem5 Developers struct timeval { 43610037SARM gem5 Developers int64_t tv_sec; //!< seconds 43710037SARM gem5 Developers int64_t tv_usec; //!< microseconds 43810037SARM gem5 Developers }; 43910037SARM gem5 Developers 44010850SGiacomo.Gabrielli@arm.com struct timespec { 44110850SGiacomo.Gabrielli@arm.com int64_t tv_sec; //!< seconds 44210850SGiacomo.Gabrielli@arm.com int64_t tv_nsec; //!< nanoseconds 44310850SGiacomo.Gabrielli@arm.com }; 44410850SGiacomo.Gabrielli@arm.com 44510037SARM gem5 Developers // For writev/readv 44610037SARM gem5 Developers struct tgt_iovec { 44710037SARM gem5 Developers uint64_t iov_base; // void * 44810037SARM gem5 Developers uint64_t iov_len; 44910037SARM gem5 Developers }; 45010037SARM gem5 Developers 45110037SARM gem5 Developers typedef struct { 45210037SARM gem5 Developers uint64_t st_dev; 45310037SARM gem5 Developers uint64_t st_ino; 45410037SARM gem5 Developers uint64_t st_nlink; 45510037SARM gem5 Developers uint32_t st_mode; 45610037SARM gem5 Developers uint32_t st_uid; 45710037SARM gem5 Developers uint32_t st_gid; 45810037SARM gem5 Developers uint32_t __pad0; 45910037SARM gem5 Developers uint64_t st_rdev; 46010037SARM gem5 Developers uint64_t st_size; 46110037SARM gem5 Developers uint64_t st_blksize; 46210037SARM gem5 Developers uint64_t st_blocks; 46310037SARM gem5 Developers uint64_t st_atimeX; 46410037SARM gem5 Developers uint64_t st_atime_nsec; 46510037SARM gem5 Developers uint64_t st_mtimeX; 46610037SARM gem5 Developers uint64_t st_mtime_nsec; 46710037SARM gem5 Developers uint64_t st_ctimeX; 46810037SARM gem5 Developers uint64_t st_ctime_nsec; 46910037SARM gem5 Developers } tgt_stat; 47010037SARM gem5 Developers 47110037SARM gem5 Developers typedef struct { 47210037SARM gem5 Developers uint64_t st_dev; 47310037SARM gem5 Developers uint64_t st_ino; 47410037SARM gem5 Developers uint32_t st_mode; 47510037SARM gem5 Developers uint32_t st_nlink; 47610037SARM gem5 Developers uint32_t st_uid; 47710037SARM gem5 Developers uint32_t st_gid; 47810037SARM gem5 Developers uint32_t __pad0; 47910037SARM gem5 Developers uint64_t st_rdev; 48010037SARM gem5 Developers uint64_t st_size; 48110037SARM gem5 Developers uint64_t st_blksize; 48210037SARM gem5 Developers uint64_t st_blocks; 48310037SARM gem5 Developers uint64_t st_atimeX; 48410037SARM gem5 Developers uint64_t st_atime_nsec; 48510037SARM gem5 Developers uint64_t st_mtimeX; 48610037SARM gem5 Developers uint64_t st_mtime_nsec; 48710037SARM gem5 Developers uint64_t st_ctimeX; 48810037SARM gem5 Developers uint64_t st_ctime_nsec; 48910037SARM gem5 Developers } tgt_stat64; 49010037SARM gem5 Developers 49110037SARM gem5 Developers typedef struct { 49210037SARM gem5 Developers int64_t uptime; /* Seconds since boot */ 49310037SARM gem5 Developers uint64_t loads[3]; /* 1, 5, and 15 minute load averages */ 49410037SARM gem5 Developers uint64_t totalram; /* Total usable main memory size */ 49510037SARM gem5 Developers uint64_t freeram; /* Available memory size */ 49610037SARM gem5 Developers uint64_t sharedram; /* Amount of shared memory */ 49710037SARM gem5 Developers uint64_t bufferram; /* Memory used by buffers */ 49810037SARM gem5 Developers uint64_t totalswap; /* Total swap space size */ 49910037SARM gem5 Developers uint64_t freeswap; /* swap space still available */ 50010037SARM gem5 Developers uint16_t procs; /* Number of current processes */ 50110037SARM gem5 Developers uint16_t pad; 50210037SARM gem5 Developers uint64_t totalhigh; /* Total high memory size */ 50310037SARM gem5 Developers uint64_t freehigh; /* Available high memory size */ 50410037SARM gem5 Developers uint32_t mem_unit; /* Memory unit size in bytes */ 50510037SARM gem5 Developers } tgt_sysinfo; 50610037SARM gem5 Developers 50710037SARM gem5 Developers /// For getrusage(). 50810037SARM gem5 Developers struct rusage { 50910037SARM gem5 Developers struct timeval ru_utime; //!< user time used 51010037SARM gem5 Developers struct timeval ru_stime; //!< system time used 51110037SARM gem5 Developers int64_t ru_maxrss; //!< max rss 51210037SARM gem5 Developers int64_t ru_ixrss; //!< integral shared memory size 51310037SARM gem5 Developers int64_t ru_idrss; //!< integral unshared data " 51410037SARM gem5 Developers int64_t ru_isrss; //!< integral unshared stack " 51510037SARM gem5 Developers int64_t ru_minflt; //!< page reclaims - total vmfaults 51610037SARM gem5 Developers int64_t ru_majflt; //!< page faults 51710037SARM gem5 Developers int64_t ru_nswap; //!< swaps 51810037SARM gem5 Developers int64_t ru_inblock; //!< block input operations 51910037SARM gem5 Developers int64_t ru_oublock; //!< block output operations 52010037SARM gem5 Developers int64_t ru_msgsnd; //!< messages sent 52110037SARM gem5 Developers int64_t ru_msgrcv; //!< messages received 52210037SARM gem5 Developers int64_t ru_nsignals; //!< signals received 52310037SARM gem5 Developers int64_t ru_nvcsw; //!< voluntary context switches 52410037SARM gem5 Developers int64_t ru_nivcsw; //!< involuntary " 52510037SARM gem5 Developers }; 52610037SARM gem5 Developers 52710037SARM gem5 Developers /// For times(). 52810037SARM gem5 Developers struct tms { 52910037SARM gem5 Developers int64_t tms_utime; //!< user time 53010037SARM gem5 Developers int64_t tms_stime; //!< system time 53110037SARM gem5 Developers int64_t tms_cutime; //!< user time of children 53210037SARM gem5 Developers int64_t tms_cstime; //!< system time of children 53310037SARM gem5 Developers }; 53413537Sandreas.sandberg@arm.com 53513537Sandreas.sandberg@arm.com static void archClone(uint64_t flags, 53613537Sandreas.sandberg@arm.com Process *pp, Process *cp, 53713537Sandreas.sandberg@arm.com ThreadContext *ptc, ThreadContext *ctc, 53813537Sandreas.sandberg@arm.com uint64_t stack, uint64_t tls) 53913537Sandreas.sandberg@arm.com { 54013537Sandreas.sandberg@arm.com ArmLinux::archClone(flags, pp, cp, ptc, ctc, stack, tls); 54113537Sandreas.sandberg@arm.com 54213537Sandreas.sandberg@arm.com if (stack) 54313537Sandreas.sandberg@arm.com ctc->setIntReg(ArmISA::INTREG_SP0, stack); 54413537Sandreas.sandberg@arm.com } 5456019Shines@cs.fsu.edu}; 5466019Shines@cs.fsu.edu 5476019Shines@cs.fsu.edu#endif 548