Searched hist:13394 (Results 1 - 2 of 2) sorted by relevance
| /gem5/src/arch/arm/ | ||
| H A D | miscregs_types.hh | 13394:ebe487b6f18a Fri Nov 02 06:33:00 EDT 2018 Giacomo Travaglini <giacomo.travaglini@arm.com> arch-arm: Remove SCTLR.VE bit ARMv8 has removed SCTLR.VE bit which is now hardcoded to 0. We are removing it from gem5 since we were not handling it anyway. Change-Id: Ibde2db45c7f8add4a3188f2cb8c23701a6088d03 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/13998 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | faults.cc | 13394:ebe487b6f18a Fri Nov 02 06:33:00 EDT 2018 Giacomo Travaglini <giacomo.travaglini@arm.com> arch-arm: Remove SCTLR.VE bit ARMv8 has removed SCTLR.VE bit which is now hardcoded to 0. We are removing it from gem5 since we were not handling it anyway. Change-Id: Ibde2db45c7f8add4a3188f2cb8c23701a6088d03 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/13998 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
Completed in 28 milliseconds