Searched hist:10467 (Results 1 - 7 of 7) sorted by relevance

/gem5/src/arch/x86/
H A Dldstflags.hh10467:dcf27c8220ac Thu Oct 16 05:49:00 EDT 2014 Andreas Hansson <andreas.hansson@arm.com> arch,x86,mem: Dynamically determine the ISA for Ruby store check

This patch makes the memory system ISA-agnostic by enabling the Ruby
Sequencer to dynamically determine if it has to do a store check. To
enable this check, the ISA is encoded as an enum, and the system
is able to provide the ISA to the Sequencer at run time.
/gem5/src/arch/x86/insts/
H A Dmicroldstop.hh10467:dcf27c8220ac Thu Oct 16 05:49:00 EDT 2014 Andreas Hansson <andreas.hansson@arm.com> arch,x86,mem: Dynamically determine the ISA for Ruby store check

This patch makes the memory system ISA-agnostic by enabling the Ruby
Sequencer to dynamically determine if it has to do a store check. To
enable this check, the ISA is encoded as an enum, and the system
is able to provide the ISA to the Sequencer at run time.
/gem5/src/mem/ruby/system/
H A DRubyPort.hh10467:dcf27c8220ac Thu Oct 16 05:49:00 EDT 2014 Andreas Hansson <andreas.hansson@arm.com> arch,x86,mem: Dynamically determine the ISA for Ruby store check

This patch makes the memory system ISA-agnostic by enabling the Ruby
Sequencer to dynamically determine if it has to do a store check. To
enable this check, the ISA is encoded as an enum, and the system
is able to provide the ISA to the Sequencer at run time.
H A DRubyPort.cc10467:dcf27c8220ac Thu Oct 16 05:49:00 EDT 2014 Andreas Hansson <andreas.hansson@arm.com> arch,x86,mem: Dynamically determine the ISA for Ruby store check

This patch makes the memory system ISA-agnostic by enabling the Ruby
Sequencer to dynamically determine if it has to do a store check. To
enable this check, the ISA is encoded as an enum, and the system
is able to provide the ISA to the Sequencer at run time.
H A DSequencer.cc10467:dcf27c8220ac Thu Oct 16 05:49:00 EDT 2014 Andreas Hansson <andreas.hansson@arm.com> arch,x86,mem: Dynamically determine the ISA for Ruby store check

This patch makes the memory system ISA-agnostic by enabling the Ruby
Sequencer to dynamically determine if it has to do a store check. To
enable this check, the ISA is encoded as an enum, and the system
is able to provide the ISA to the Sequencer at run time.
/gem5/src/sim/
H A Dsystem.hh10467:dcf27c8220ac Thu Oct 16 05:49:00 EDT 2014 Andreas Hansson <andreas.hansson@arm.com> arch,x86,mem: Dynamically determine the ISA for Ruby store check

This patch makes the memory system ISA-agnostic by enabling the Ruby
Sequencer to dynamically determine if it has to do a store check. To
enable this check, the ISA is encoded as an enum, and the system
is able to provide the ISA to the Sequencer at run time.
/gem5/src/
H A DSConscript10467:dcf27c8220ac Thu Oct 16 05:49:00 EDT 2014 Andreas Hansson <andreas.hansson@arm.com> arch,x86,mem: Dynamically determine the ISA for Ruby store check

This patch makes the memory system ISA-agnostic by enabling the Ruby
Sequencer to dynamically determine if it has to do a store check. To
enable this check, the ISA is encoded as an enum, and the system
is able to provide the ISA to the Sequencer at run time.

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