cmos.cc revision 5393
1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 */ 30 31#include "dev/x86/south_bridge/cmos.hh" 32#include "mem/packet_access.hh" 33 34Tick 35X86ISA::Cmos::read(PacketPtr pkt) 36{ 37 assert(pkt->getSize() == 1); 38 switch(pkt->getAddr() - addrRange.start) 39 { 40 case 0x0: 41 pkt->set(address); 42 break; 43 case 0x1: 44 pkt->set(readRegister(address)); 45 break; 46 default: 47 panic("Read from undefined CMOS port.\n"); 48 } 49 return latency; 50} 51 52Tick 53X86ISA::Cmos::write(PacketPtr pkt) 54{ 55 assert(pkt->getSize() == 1); 56 switch(pkt->getAddr() - addrRange.start) 57 { 58 case 0x0: 59 address = pkt->get<uint8_t>(); 60 break; 61 case 0x1: 62 writeRegister(address, pkt->get<uint8_t>()); 63 break; 64 default: 65 panic("Write to undefined CMOS port.\n"); 66 } 67 return latency; 68} 69 70uint8_t 71X86ISA::Cmos::readRegister(uint8_t reg) 72{ 73 assert(reg < numRegs); 74 if (reg <= 0xD) { 75 return rtc.readData(reg); 76 } else { 77 warn("Reading non-volitile CMOS address %x as %x.\n", reg, regs[reg]); 78 } 79 return regs[reg]; 80} 81 82void 83X86ISA::Cmos::writeRegister(uint8_t reg, uint8_t val) 84{ 85 assert(reg < numRegs); 86 if (reg <= 0xD) { 87 rtc.writeData(reg, val); 88 return; 89 } else { 90 warn("Writing non-volitile CMOS address %x with %x.\n", reg, val); 91 } 92 regs[reg] = val; 93} 94