1# Copyright (c) 2013 Andreas Sandberg
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright
9# notice, this list of conditions and the following disclaimer in the
10# documentation and/or other materials provided with the distribution;
11# neither the name of the copyright holders nor the names of its
12# contributors may be used to endorse or promote products derived from
13# this software without specific prior written permission.
14#
15# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26#
27# Authors: Andreas Sandberg
28
29
30# Register usage:
31#  t1, t2 == temporaries
32
33fldenvTemplate = """
34    ld t1, seg, %(mode)s, "DISPLACEMENT + 0", dataSize=2
35    wrval fcw, t1
36
37    ld t1, seg, %(mode)s, "DISPLACEMENT + 4", dataSize=2
38    wrval fsw, t1
39
40    ld t1, seg, %(mode)s, "DISPLACEMENT + 8", dataSize=2
41    wrval ftw, t1
42
43    ld t1, seg, %(mode)s, "DISPLACEMENT + 12", dataSize=4
44    wrval "InstRegIndex(MISCREG_FIOFF)", t1
45
46    ld t1, seg, %(mode)s, "DISPLACEMENT + 16 + 0", dataSize=2
47    wrval "InstRegIndex(MISCREG_FISEG)", t1
48
49    ld t1, seg, %(mode)s, "DISPLACEMENT + 16 + 2", dataSize=2
50    wrval "InstRegIndex(MISCREG_FOP)", t1
51
52    ld t1, seg, %(mode)s, "DISPLACEMENT + 20", dataSize=4
53    wrval "InstRegIndex(MISCREG_FOOFF)", t1
54
55    ld t1, seg, %(mode)s, "DISPLACEMENT + 24", dataSize=2
56    wrval "InstRegIndex(MISCREG_FOSEG)", t1
57"""
58
59fnstenvTemplate = """
60    rdval t2, fcw
61    st t2, seg, %(mode)s, "DISPLACEMENT + 0", dataSize=2
62
63    # FSW includes TOP when read
64    rdval t1, fsw
65    st t1, seg, %(mode)s, "DISPLACEMENT + 4", dataSize=2
66    srli t1, t1, 11, dataSize=2
67    andi t1, t1, 0x7, dataSize=2
68    wrval "InstRegIndex(MISCREG_X87_TOP)", t1
69
70    rdval t1, ftw
71    st t1, seg, %(mode)s, "DISPLACEMENT + 8", dataSize=2
72
73    rdval t1, "InstRegIndex(MISCREG_FIOFF)"
74    st t1, seg, %(mode)s, "DISPLACEMENT + 12", dataSize=4
75
76    rdval t1, "InstRegIndex(MISCREG_FISEG)"
77    st t1, seg, %(mode)s, "DISPLACEMENT + 16 + 0", dataSize=2
78
79    rdval t1, "InstRegIndex(MISCREG_FOP)"
80    st t1, seg, %(mode)s, "DISPLACEMENT + 16 + 2", dataSize=2
81
82    rdval t1, "InstRegIndex(MISCREG_FOOFF)"
83    st t1, seg, %(mode)s, "DISPLACEMENT + 20", dataSize=4
84
85    rdval t1, "InstRegIndex(MISCREG_FOSEG)"
86    st t1, seg, %(mode)s, "DISPLACEMENT + 24", dataSize=2
87
88    # Mask exceptions
89    ori t2, t2, 0x3F
90    wrval fcw, t2
91"""
92
93microcode = '''
94def macroop FLDENV_M {
95''' + fldenvTemplate % { "mode" : "sib" } + '''
96};
97
98def macroop FLDENV_P {
99    rdip t7
100''' + fldenvTemplate % { "mode" : "riprel" } + '''
101};
102
103def macroop FNSTENV_M {
104''' + fnstenvTemplate % { "mode" : "sib" } + '''
105};
106
107def macroop FNSTENV_P {
108    rdip t7
109''' + fnstenvTemplate % { "mode" : "riprel" } + '''
110};
111'''
112