registers.hh revision 7649
18889Sgeoffrey.blake@arm.com/* 28889Sgeoffrey.blake@arm.com * Copyright (c) 2010 ARM Limited 38889Sgeoffrey.blake@arm.com * All rights reserved 410036SAli.Saidi@ARM.com * 58889Sgeoffrey.blake@arm.com * The license below extends only to copyright in the software and shall 610036SAli.Saidi@ARM.com * not be construed as granting a license to any other intellectual 78889Sgeoffrey.blake@arm.com * property including but not limited to intellectual property relating 88889Sgeoffrey.blake@arm.com * to a hardware implementation of the functionality of the software 98889Sgeoffrey.blake@arm.com * licensed hereunder. You may use the software subject to the license 108889Sgeoffrey.blake@arm.com * terms below provided that you ensure that this notice is replicated 118889Sgeoffrey.blake@arm.com * unmodified and in its entirety in all distributions of the software, 128889Sgeoffrey.blake@arm.com * modified or unmodified, in source code or in binary form. 1310315Snilay@cs.wisc.edu * 148889Sgeoffrey.blake@arm.com * Copyright (c) 2007-2008 The Florida State University 159885Sstever@gmail.com * All rights reserved. 169885Sstever@gmail.com * 1711570SCurtis.Dunham@arm.com * Redistribution and use in source and binary forms, with or without 1810036SAli.Saidi@ARM.com * modification, are permitted provided that the following conditions are 1911312Santhony.gutierrez@amd.com * met: redistributions of source code must retain the above copyright 208889Sgeoffrey.blake@arm.com * notice, this list of conditions and the following disclaimer; 218889Sgeoffrey.blake@arm.com * redistributions in binary form must reproduce the above copyright 2210315Snilay@cs.wisc.edu * notice, this list of conditions and the following disclaimer in the 238889Sgeoffrey.blake@arm.com * documentation and/or other materials provided with the distribution; 2410038SAli.Saidi@ARM.com * neither the name of the copyright holders nor the names of its 259449SAli.Saidi@ARM.com * contributors may be used to endorse or promote products derived from 269449SAli.Saidi@ARM.com * this software without specific prior written permission. 278889Sgeoffrey.blake@arm.com * 2810736Snilay@cs.wisc.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2911219Snilay@cs.wisc.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 308889Sgeoffrey.blake@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 3111570SCurtis.Dunham@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 3211570SCurtis.Dunham@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 3311570SCurtis.Dunham@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3411570SCurtis.Dunham@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 358889Sgeoffrey.blake@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 368889Sgeoffrey.blake@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3711440SCurtis.Dunham@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3811440SCurtis.Dunham@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 398889Sgeoffrey.blake@arm.com * 408889Sgeoffrey.blake@arm.com * Authors: Stephen Hines 418889Sgeoffrey.blake@arm.com */ 428889Sgeoffrey.blake@arm.com 438889Sgeoffrey.blake@arm.com#ifndef __ARCH_ARM_REGISTERS_HH__ 448889Sgeoffrey.blake@arm.com#define __ARCH_ARM_REGISTERS_HH__ 458889Sgeoffrey.blake@arm.com 468889Sgeoffrey.blake@arm.com#include "arch/arm/max_inst_regs.hh" 478889Sgeoffrey.blake@arm.com#include "arch/arm/intregs.hh" 489885Sstever@gmail.com#include "arch/arm/miscregs.hh" 499885Sstever@gmail.com 509885Sstever@gmail.comnamespace ArmISA { 5110315Snilay@cs.wisc.edu 5210036SAli.Saidi@ARM.comusing ArmISAInst::MaxInstSrcRegs; 5310315Snilay@cs.wisc.eduusing ArmISAInst::MaxInstDestRegs; 549885Sstever@gmail.com 559885Sstever@gmail.comtypedef uint16_t RegIndex; 568889Sgeoffrey.blake@arm.com 578889Sgeoffrey.blake@arm.comtypedef uint64_t IntReg; 5810038SAli.Saidi@ARM.com 598889Sgeoffrey.blake@arm.com// floating point register file entry type 608889Sgeoffrey.blake@arm.comtypedef uint32_t FloatRegBits; 618889Sgeoffrey.blake@arm.comtypedef float FloatReg; 628889Sgeoffrey.blake@arm.com 638889Sgeoffrey.blake@arm.com// cop-0/cop-1 system control register 648889Sgeoffrey.blake@arm.comtypedef uint64_t MiscReg; 658889Sgeoffrey.blake@arm.com 668889Sgeoffrey.blake@arm.com// Constants Related to the number of registers 679481Snilay@cs.wisc.educonst int NumIntArchRegs = NUM_ARCH_INTREGS; 6811960Sgabeblack@google.com// The number of single precision floating point registers 698889Sgeoffrey.blake@arm.comconst int NumFloatArchRegs = 64; 709885Sstever@gmail.comconst int NumFloatSpecialRegs = 8; 718889Sgeoffrey.blake@arm.com 728889Sgeoffrey.blake@arm.comconst int NumIntRegs = NUM_INTREGS; 738889Sgeoffrey.blake@arm.comconst int NumFloatRegs = NumFloatArchRegs + NumFloatSpecialRegs; 748889Sgeoffrey.blake@arm.comconst int NumMiscRegs = NUM_MISCREGS; 758889Sgeoffrey.blake@arm.com 768889Sgeoffrey.blake@arm.comconst int TotalNumRegs = NumIntRegs + NumFloatRegs + NumMiscRegs; 778889Sgeoffrey.blake@arm.com 788889Sgeoffrey.blake@arm.com// semantically meaningful register indices 798889Sgeoffrey.blake@arm.comconst int ReturnValueReg = 0; 8011570SCurtis.Dunham@arm.comconst int ReturnValueReg1 = 1; 818889Sgeoffrey.blake@arm.comconst int ReturnValueReg2 = 2; 828889Sgeoffrey.blake@arm.comconst int ArgumentReg0 = 0; 838889Sgeoffrey.blake@arm.comconst int ArgumentReg1 = 1; 848889Sgeoffrey.blake@arm.comconst int ArgumentReg2 = 2; 8510038SAli.Saidi@ARM.comconst int ArgumentReg3 = 3; 868889Sgeoffrey.blake@arm.comconst int FramePointerReg = 11; 8710036SAli.Saidi@ARM.comconst int StackPointerReg = INTREG_SP; 8810036SAli.Saidi@ARM.comconst int ReturnAddressReg = INTREG_LR; 8910451Snilay@cs.wisc.educonst int PCReg = INTREG_PC; 908889Sgeoffrey.blake@arm.com 918889Sgeoffrey.blake@arm.comconst int ZeroReg = INTREG_ZERO; 928889Sgeoffrey.blake@arm.com 938889Sgeoffrey.blake@arm.comconst int SyscallNumReg = ReturnValueReg; 948889Sgeoffrey.blake@arm.comconst int SyscallPseudoReturnReg = ReturnValueReg; 958889Sgeoffrey.blake@arm.comconst int SyscallSuccessReg = ReturnValueReg; 968889Sgeoffrey.blake@arm.com 978889Sgeoffrey.blake@arm.com// These help enumerate all the registers for dependence tracking. 988889Sgeoffrey.blake@arm.comconst int FP_Base_DepTag = NumIntRegs * (MODE_MAXMODE + 1); 998889Sgeoffrey.blake@arm.comconst int Ctrl_Base_DepTag = FP_Base_DepTag + NumFloatRegs; 1008889Sgeoffrey.blake@arm.comconst int Max_DepTag = Ctrl_Base_DepTag + NumMiscRegs; 1018889Sgeoffrey.blake@arm.com 1029449SAli.Saidi@ARM.comtypedef union { 1038889Sgeoffrey.blake@arm.com IntReg intreg; 1048889Sgeoffrey.blake@arm.com FloatReg fpreg; 10510038SAli.Saidi@ARM.com MiscReg ctrlreg; 1068889Sgeoffrey.blake@arm.com} AnyReg; 1078889Sgeoffrey.blake@arm.com 1088889Sgeoffrey.blake@arm.com} // namespace ArmISA 1098889Sgeoffrey.blake@arm.com 1108889Sgeoffrey.blake@arm.com#endif 1118889Sgeoffrey.blake@arm.com