misc.isa revision 7848
17202Sgblack@eecs.umich.edu// -*- mode:c++ -*- 27202Sgblack@eecs.umich.edu 37202Sgblack@eecs.umich.edu// Copyright (c) 2010 ARM Limited 47202Sgblack@eecs.umich.edu// All rights reserved 57202Sgblack@eecs.umich.edu// 67202Sgblack@eecs.umich.edu// The license below extends only to copyright in the software and shall 77202Sgblack@eecs.umich.edu// not be construed as granting a license to any other intellectual 87202Sgblack@eecs.umich.edu// property including but not limited to intellectual property relating 97202Sgblack@eecs.umich.edu// to a hardware implementation of the functionality of the software 107202Sgblack@eecs.umich.edu// licensed hereunder. You may use the software subject to the license 117202Sgblack@eecs.umich.edu// terms below provided that you ensure that this notice is replicated 127202Sgblack@eecs.umich.edu// unmodified and in its entirety in all distributions of the software, 137202Sgblack@eecs.umich.edu// modified or unmodified, in source code or in binary form. 147202Sgblack@eecs.umich.edu// 157202Sgblack@eecs.umich.edu// Redistribution and use in source and binary forms, with or without 167202Sgblack@eecs.umich.edu// modification, are permitted provided that the following conditions are 177202Sgblack@eecs.umich.edu// met: redistributions of source code must retain the above copyright 187202Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer; 197202Sgblack@eecs.umich.edu// redistributions in binary form must reproduce the above copyright 207202Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer in the 217202Sgblack@eecs.umich.edu// documentation and/or other materials provided with the distribution; 227202Sgblack@eecs.umich.edu// neither the name of the copyright holders nor the names of its 237202Sgblack@eecs.umich.edu// contributors may be used to endorse or promote products derived from 247202Sgblack@eecs.umich.edu// this software without specific prior written permission. 257202Sgblack@eecs.umich.edu// 267202Sgblack@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 277202Sgblack@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 287202Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 297202Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 307202Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 317202Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 327202Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 337202Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 347202Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 357202Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 367202Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 377202Sgblack@eecs.umich.edu// 387202Sgblack@eecs.umich.edu// Authors: Gabe Black 397202Sgblack@eecs.umich.edu 407202Sgblack@eecs.umich.edudef template MrsDeclare {{ 417202Sgblack@eecs.umich.educlass %(class_name)s : public %(base_class)s 427202Sgblack@eecs.umich.edu{ 437202Sgblack@eecs.umich.edu protected: 447202Sgblack@eecs.umich.edu public: 457202Sgblack@eecs.umich.edu // Constructor 467202Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst machInst, IntRegIndex _dest); 477202Sgblack@eecs.umich.edu %(BasicExecDeclare)s 487202Sgblack@eecs.umich.edu}; 497202Sgblack@eecs.umich.edu}}; 507202Sgblack@eecs.umich.edu 517202Sgblack@eecs.umich.edudef template MrsConstructor {{ 527202Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 537202Sgblack@eecs.umich.edu IntRegIndex _dest) 547202Sgblack@eecs.umich.edu : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest) 557202Sgblack@eecs.umich.edu { 567202Sgblack@eecs.umich.edu %(constructor)s; 577848SAli.Saidi@ARM.com if (!(condCode == COND_AL || condCode == COND_UC)) { 587848SAli.Saidi@ARM.com for (int x = 0; x < _numDestRegs; x++) { 597848SAli.Saidi@ARM.com _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 607848SAli.Saidi@ARM.com } 617848SAli.Saidi@ARM.com } 627202Sgblack@eecs.umich.edu } 637202Sgblack@eecs.umich.edu}}; 647202Sgblack@eecs.umich.edu 657202Sgblack@eecs.umich.edudef template MsrRegDeclare {{ 667202Sgblack@eecs.umich.educlass %(class_name)s : public %(base_class)s 677202Sgblack@eecs.umich.edu{ 687202Sgblack@eecs.umich.edu protected: 697202Sgblack@eecs.umich.edu public: 707202Sgblack@eecs.umich.edu // Constructor 717202Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, uint8_t mask); 727202Sgblack@eecs.umich.edu %(BasicExecDeclare)s 737202Sgblack@eecs.umich.edu}; 747202Sgblack@eecs.umich.edu}}; 757202Sgblack@eecs.umich.edu 767202Sgblack@eecs.umich.edudef template MsrRegConstructor {{ 777202Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 787202Sgblack@eecs.umich.edu IntRegIndex _op1, 797202Sgblack@eecs.umich.edu uint8_t mask) 807202Sgblack@eecs.umich.edu : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1, mask) 817202Sgblack@eecs.umich.edu { 827202Sgblack@eecs.umich.edu %(constructor)s; 837848SAli.Saidi@ARM.com if (!(condCode == COND_AL || condCode == COND_UC)) { 847848SAli.Saidi@ARM.com for (int x = 0; x < _numDestRegs; x++) { 857848SAli.Saidi@ARM.com _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 867848SAli.Saidi@ARM.com } 877848SAli.Saidi@ARM.com } 887202Sgblack@eecs.umich.edu } 897202Sgblack@eecs.umich.edu}}; 907202Sgblack@eecs.umich.edu 917202Sgblack@eecs.umich.edudef template MsrImmDeclare {{ 927202Sgblack@eecs.umich.educlass %(class_name)s : public %(base_class)s 937202Sgblack@eecs.umich.edu{ 947202Sgblack@eecs.umich.edu protected: 957202Sgblack@eecs.umich.edu public: 967202Sgblack@eecs.umich.edu // Constructor 977202Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst machInst, uint32_t imm, uint8_t mask); 987202Sgblack@eecs.umich.edu %(BasicExecDeclare)s 997202Sgblack@eecs.umich.edu}; 1007202Sgblack@eecs.umich.edu}}; 1017202Sgblack@eecs.umich.edu 1027202Sgblack@eecs.umich.edudef template MsrImmConstructor {{ 1037202Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 1047202Sgblack@eecs.umich.edu uint32_t imm, 1057202Sgblack@eecs.umich.edu uint8_t mask) 1067202Sgblack@eecs.umich.edu : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, imm, mask) 1077202Sgblack@eecs.umich.edu { 1087202Sgblack@eecs.umich.edu %(constructor)s; 1097848SAli.Saidi@ARM.com if (!(condCode == COND_AL || condCode == COND_UC)) { 1107848SAli.Saidi@ARM.com for (int x = 0; x < _numDestRegs; x++) { 1117848SAli.Saidi@ARM.com _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 1127848SAli.Saidi@ARM.com } 1137848SAli.Saidi@ARM.com } 1147202Sgblack@eecs.umich.edu } 1157202Sgblack@eecs.umich.edu}}; 1167208Sgblack@eecs.umich.edu 1177306Sgblack@eecs.umich.edudef template ImmOpDeclare {{ 1187306Sgblack@eecs.umich.educlass %(class_name)s : public %(base_class)s 1197306Sgblack@eecs.umich.edu{ 1207306Sgblack@eecs.umich.edu protected: 1217306Sgblack@eecs.umich.edu public: 1227306Sgblack@eecs.umich.edu // Constructor 1237330Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst machInst, uint64_t _imm); 1247306Sgblack@eecs.umich.edu %(BasicExecDeclare)s 1257306Sgblack@eecs.umich.edu}; 1267306Sgblack@eecs.umich.edu}}; 1277306Sgblack@eecs.umich.edu 1287306Sgblack@eecs.umich.edudef template ImmOpConstructor {{ 1297330Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, uint64_t _imm) 1307306Sgblack@eecs.umich.edu : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _imm) 1317306Sgblack@eecs.umich.edu { 1327306Sgblack@eecs.umich.edu %(constructor)s; 1337848SAli.Saidi@ARM.com if (!(condCode == COND_AL || condCode == COND_UC)) { 1347848SAli.Saidi@ARM.com for (int x = 0; x < _numDestRegs; x++) { 1357848SAli.Saidi@ARM.com _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 1367848SAli.Saidi@ARM.com } 1377848SAli.Saidi@ARM.com } 1387306Sgblack@eecs.umich.edu } 1397306Sgblack@eecs.umich.edu}}; 1407306Sgblack@eecs.umich.edu 1417332Sgblack@eecs.umich.edudef template RegImmOpDeclare {{ 1427332Sgblack@eecs.umich.educlass %(class_name)s : public %(base_class)s 1437332Sgblack@eecs.umich.edu{ 1447332Sgblack@eecs.umich.edu protected: 1457332Sgblack@eecs.umich.edu public: 1467332Sgblack@eecs.umich.edu // Constructor 1477332Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, uint64_t _imm); 1487332Sgblack@eecs.umich.edu %(BasicExecDeclare)s 1497332Sgblack@eecs.umich.edu}; 1507332Sgblack@eecs.umich.edu}}; 1517332Sgblack@eecs.umich.edu 1527332Sgblack@eecs.umich.edudef template RegImmOpConstructor {{ 1537332Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 1547332Sgblack@eecs.umich.edu IntRegIndex _dest, uint64_t _imm) 1557332Sgblack@eecs.umich.edu : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _imm) 1567332Sgblack@eecs.umich.edu { 1577332Sgblack@eecs.umich.edu %(constructor)s; 1587848SAli.Saidi@ARM.com if (!(condCode == COND_AL || condCode == COND_UC)) { 1597848SAli.Saidi@ARM.com for (int x = 0; x < _numDestRegs; x++) { 1607848SAli.Saidi@ARM.com _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 1617848SAli.Saidi@ARM.com } 1627848SAli.Saidi@ARM.com } 1637332Sgblack@eecs.umich.edu } 1647332Sgblack@eecs.umich.edu}}; 1657332Sgblack@eecs.umich.edu 1667261Sgblack@eecs.umich.edudef template RegRegOpDeclare {{ 1677208Sgblack@eecs.umich.educlass %(class_name)s : public %(base_class)s 1687208Sgblack@eecs.umich.edu{ 1697208Sgblack@eecs.umich.edu protected: 1707208Sgblack@eecs.umich.edu public: 1717208Sgblack@eecs.umich.edu // Constructor 1727208Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst machInst, 1737208Sgblack@eecs.umich.edu IntRegIndex _dest, IntRegIndex _op1); 1747208Sgblack@eecs.umich.edu %(BasicExecDeclare)s 1757208Sgblack@eecs.umich.edu}; 1767208Sgblack@eecs.umich.edu}}; 1777208Sgblack@eecs.umich.edu 1787261Sgblack@eecs.umich.edudef template RegRegOpConstructor {{ 1797208Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 1807208Sgblack@eecs.umich.edu IntRegIndex _dest, IntRegIndex _op1) 1817208Sgblack@eecs.umich.edu : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _op1) 1827208Sgblack@eecs.umich.edu { 1837208Sgblack@eecs.umich.edu %(constructor)s; 1847848SAli.Saidi@ARM.com if (!(condCode == COND_AL || condCode == COND_UC)) { 1857848SAli.Saidi@ARM.com for (int x = 0; x < _numDestRegs; x++) { 1867848SAli.Saidi@ARM.com _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 1877848SAli.Saidi@ARM.com } 1887848SAli.Saidi@ARM.com } 1897208Sgblack@eecs.umich.edu } 1907208Sgblack@eecs.umich.edu}}; 1917225Sgblack@eecs.umich.edu 1927233Sgblack@eecs.umich.edudef template RegRegRegImmOpDeclare {{ 1937233Sgblack@eecs.umich.educlass %(class_name)s : public %(base_class)s 1947233Sgblack@eecs.umich.edu{ 1957233Sgblack@eecs.umich.edu protected: 1967233Sgblack@eecs.umich.edu public: 1977233Sgblack@eecs.umich.edu // Constructor 1987233Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst machInst, 1997233Sgblack@eecs.umich.edu IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, 2007330Sgblack@eecs.umich.edu uint64_t _imm); 2017233Sgblack@eecs.umich.edu %(BasicExecDeclare)s 2027233Sgblack@eecs.umich.edu}; 2037233Sgblack@eecs.umich.edu}}; 2047233Sgblack@eecs.umich.edu 2057233Sgblack@eecs.umich.edudef template RegRegRegImmOpConstructor {{ 2067233Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 2077233Sgblack@eecs.umich.edu IntRegIndex _dest, 2087233Sgblack@eecs.umich.edu IntRegIndex _op1, 2097233Sgblack@eecs.umich.edu IntRegIndex _op2, 2107330Sgblack@eecs.umich.edu uint64_t _imm) 2117233Sgblack@eecs.umich.edu : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 2127233Sgblack@eecs.umich.edu _dest, _op1, _op2, _imm) 2137233Sgblack@eecs.umich.edu { 2147233Sgblack@eecs.umich.edu %(constructor)s; 2157848SAli.Saidi@ARM.com if (!(condCode == COND_AL || condCode == COND_UC)) { 2167848SAli.Saidi@ARM.com for (int x = 0; x < _numDestRegs; x++) { 2177848SAli.Saidi@ARM.com _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 2187848SAli.Saidi@ARM.com } 2197848SAli.Saidi@ARM.com } 2207233Sgblack@eecs.umich.edu } 2217233Sgblack@eecs.umich.edu}}; 2227233Sgblack@eecs.umich.edu 2237241Sgblack@eecs.umich.edudef template RegRegRegRegOpDeclare {{ 2247241Sgblack@eecs.umich.educlass %(class_name)s : public %(base_class)s 2257241Sgblack@eecs.umich.edu{ 2267241Sgblack@eecs.umich.edu protected: 2277241Sgblack@eecs.umich.edu public: 2287241Sgblack@eecs.umich.edu // Constructor 2297241Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst machInst, 2307241Sgblack@eecs.umich.edu IntRegIndex _dest, IntRegIndex _op1, 2317241Sgblack@eecs.umich.edu IntRegIndex _op2, IntRegIndex _op3); 2327241Sgblack@eecs.umich.edu %(BasicExecDeclare)s 2337241Sgblack@eecs.umich.edu}; 2347241Sgblack@eecs.umich.edu}}; 2357241Sgblack@eecs.umich.edu 2367241Sgblack@eecs.umich.edudef template RegRegRegRegOpConstructor {{ 2377241Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 2387241Sgblack@eecs.umich.edu IntRegIndex _dest, 2397241Sgblack@eecs.umich.edu IntRegIndex _op1, 2407241Sgblack@eecs.umich.edu IntRegIndex _op2, 2417241Sgblack@eecs.umich.edu IntRegIndex _op3) 2427241Sgblack@eecs.umich.edu : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 2437241Sgblack@eecs.umich.edu _dest, _op1, _op2, _op3) 2447241Sgblack@eecs.umich.edu { 2457241Sgblack@eecs.umich.edu %(constructor)s; 2467848SAli.Saidi@ARM.com if (!(condCode == COND_AL || condCode == COND_UC)) { 2477848SAli.Saidi@ARM.com for (int x = 0; x < _numDestRegs; x++) { 2487848SAli.Saidi@ARM.com _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 2497848SAli.Saidi@ARM.com } 2507848SAli.Saidi@ARM.com } 2517241Sgblack@eecs.umich.edu } 2527241Sgblack@eecs.umich.edu}}; 2537241Sgblack@eecs.umich.edu 2547238Sgblack@eecs.umich.edudef template RegRegRegOpDeclare {{ 2557238Sgblack@eecs.umich.educlass %(class_name)s : public %(base_class)s 2567238Sgblack@eecs.umich.edu{ 2577238Sgblack@eecs.umich.edu protected: 2587238Sgblack@eecs.umich.edu public: 2597238Sgblack@eecs.umich.edu // Constructor 2607238Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst machInst, 2617238Sgblack@eecs.umich.edu IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2); 2627238Sgblack@eecs.umich.edu %(BasicExecDeclare)s 2637238Sgblack@eecs.umich.edu}; 2647238Sgblack@eecs.umich.edu}}; 2657238Sgblack@eecs.umich.edu 2667238Sgblack@eecs.umich.edudef template RegRegRegOpConstructor {{ 2677238Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 2687238Sgblack@eecs.umich.edu IntRegIndex _dest, 2697238Sgblack@eecs.umich.edu IntRegIndex _op1, 2707238Sgblack@eecs.umich.edu IntRegIndex _op2) 2717238Sgblack@eecs.umich.edu : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 2727238Sgblack@eecs.umich.edu _dest, _op1, _op2) 2737238Sgblack@eecs.umich.edu { 2747238Sgblack@eecs.umich.edu %(constructor)s; 2757848SAli.Saidi@ARM.com if (!(condCode == COND_AL || condCode == COND_UC)) { 2767848SAli.Saidi@ARM.com for (int x = 0; x < _numDestRegs; x++) { 2777848SAli.Saidi@ARM.com _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 2787848SAli.Saidi@ARM.com } 2797848SAli.Saidi@ARM.com } 2807238Sgblack@eecs.umich.edu } 2817238Sgblack@eecs.umich.edu}}; 2827238Sgblack@eecs.umich.edu 2837331Sgblack@eecs.umich.edudef template RegRegImmOpDeclare {{ 2847331Sgblack@eecs.umich.educlass %(class_name)s : public %(base_class)s 2857331Sgblack@eecs.umich.edu{ 2867331Sgblack@eecs.umich.edu protected: 2877331Sgblack@eecs.umich.edu public: 2887331Sgblack@eecs.umich.edu // Constructor 2897331Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst machInst, 2907331Sgblack@eecs.umich.edu IntRegIndex _dest, IntRegIndex _op1, 2917331Sgblack@eecs.umich.edu uint64_t _imm); 2927331Sgblack@eecs.umich.edu %(BasicExecDeclare)s 2937331Sgblack@eecs.umich.edu}; 2947331Sgblack@eecs.umich.edu}}; 2957331Sgblack@eecs.umich.edu 2967331Sgblack@eecs.umich.edudef template RegRegImmOpConstructor {{ 2977331Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 2987331Sgblack@eecs.umich.edu IntRegIndex _dest, 2997331Sgblack@eecs.umich.edu IntRegIndex _op1, 3007331Sgblack@eecs.umich.edu uint64_t _imm) 3017331Sgblack@eecs.umich.edu : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 3027331Sgblack@eecs.umich.edu _dest, _op1, _imm) 3037331Sgblack@eecs.umich.edu { 3047331Sgblack@eecs.umich.edu %(constructor)s; 3057848SAli.Saidi@ARM.com if (!(condCode == COND_AL || condCode == COND_UC)) { 3067848SAli.Saidi@ARM.com for (int x = 0; x < _numDestRegs; x++) { 3077848SAli.Saidi@ARM.com _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 3087848SAli.Saidi@ARM.com } 3097848SAli.Saidi@ARM.com } 3107331Sgblack@eecs.umich.edu } 3117331Sgblack@eecs.umich.edu}}; 3127331Sgblack@eecs.umich.edu 3137253Sgblack@eecs.umich.edudef template RegRegImmImmOpDeclare {{ 3147253Sgblack@eecs.umich.educlass %(class_name)s : public %(base_class)s 3157253Sgblack@eecs.umich.edu{ 3167253Sgblack@eecs.umich.edu protected: 3177253Sgblack@eecs.umich.edu public: 3187253Sgblack@eecs.umich.edu // Constructor 3197253Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst machInst, 3207253Sgblack@eecs.umich.edu IntRegIndex _dest, IntRegIndex _op1, 3217330Sgblack@eecs.umich.edu uint64_t _imm1, uint64_t _imm2); 3227253Sgblack@eecs.umich.edu %(BasicExecDeclare)s 3237253Sgblack@eecs.umich.edu}; 3247253Sgblack@eecs.umich.edu}}; 3257253Sgblack@eecs.umich.edu 3267253Sgblack@eecs.umich.edudef template RegRegImmImmOpConstructor {{ 3277253Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 3287253Sgblack@eecs.umich.edu IntRegIndex _dest, 3297253Sgblack@eecs.umich.edu IntRegIndex _op1, 3307330Sgblack@eecs.umich.edu uint64_t _imm1, 3317330Sgblack@eecs.umich.edu uint64_t _imm2) 3327253Sgblack@eecs.umich.edu : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 3337253Sgblack@eecs.umich.edu _dest, _op1, _imm1, _imm2) 3347253Sgblack@eecs.umich.edu { 3357253Sgblack@eecs.umich.edu %(constructor)s; 3367848SAli.Saidi@ARM.com if (!(condCode == COND_AL || condCode == COND_UC)) { 3377848SAli.Saidi@ARM.com for (int x = 0; x < _numDestRegs; x++) { 3387848SAli.Saidi@ARM.com _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 3397848SAli.Saidi@ARM.com } 3407848SAli.Saidi@ARM.com } 3417253Sgblack@eecs.umich.edu } 3427253Sgblack@eecs.umich.edu}}; 3437253Sgblack@eecs.umich.edu 3447232Sgblack@eecs.umich.edudef template RegImmRegOpDeclare {{ 3457225Sgblack@eecs.umich.educlass %(class_name)s : public %(base_class)s 3467225Sgblack@eecs.umich.edu{ 3477225Sgblack@eecs.umich.edu protected: 3487225Sgblack@eecs.umich.edu public: 3497225Sgblack@eecs.umich.edu // Constructor 3507225Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst machInst, 3517330Sgblack@eecs.umich.edu IntRegIndex _dest, uint64_t _imm, IntRegIndex _op1); 3527225Sgblack@eecs.umich.edu %(BasicExecDeclare)s 3537225Sgblack@eecs.umich.edu}; 3547225Sgblack@eecs.umich.edu}}; 3557225Sgblack@eecs.umich.edu 3567232Sgblack@eecs.umich.edudef template RegImmRegOpConstructor {{ 3577225Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 3587225Sgblack@eecs.umich.edu IntRegIndex _dest, 3597330Sgblack@eecs.umich.edu uint64_t _imm, 3607225Sgblack@eecs.umich.edu IntRegIndex _op1) 3617225Sgblack@eecs.umich.edu : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 3627232Sgblack@eecs.umich.edu _dest, _imm, _op1) 3637225Sgblack@eecs.umich.edu { 3647225Sgblack@eecs.umich.edu %(constructor)s; 3657848SAli.Saidi@ARM.com if (!(condCode == COND_AL || condCode == COND_UC)) { 3667848SAli.Saidi@ARM.com for (int x = 0; x < _numDestRegs; x++) { 3677848SAli.Saidi@ARM.com _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 3687848SAli.Saidi@ARM.com } 3697848SAli.Saidi@ARM.com } 3707225Sgblack@eecs.umich.edu } 3717225Sgblack@eecs.umich.edu}}; 3727225Sgblack@eecs.umich.edu 3737232Sgblack@eecs.umich.edudef template RegImmRegShiftOpDeclare {{ 3747225Sgblack@eecs.umich.educlass %(class_name)s : public %(base_class)s 3757225Sgblack@eecs.umich.edu{ 3767225Sgblack@eecs.umich.edu protected: 3777225Sgblack@eecs.umich.edu public: 3787225Sgblack@eecs.umich.edu // Constructor 3797225Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst machInst, 3807330Sgblack@eecs.umich.edu IntRegIndex _dest, uint64_t _imm, IntRegIndex _op1, 3817225Sgblack@eecs.umich.edu int32_t _shiftAmt, ArmShiftType _shiftType); 3827225Sgblack@eecs.umich.edu %(BasicExecDeclare)s 3837225Sgblack@eecs.umich.edu}; 3847225Sgblack@eecs.umich.edu}}; 3857225Sgblack@eecs.umich.edu 3867232Sgblack@eecs.umich.edudef template RegImmRegShiftOpConstructor {{ 3877225Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 3887225Sgblack@eecs.umich.edu IntRegIndex _dest, 3897330Sgblack@eecs.umich.edu uint64_t _imm, 3907225Sgblack@eecs.umich.edu IntRegIndex _op1, 3917225Sgblack@eecs.umich.edu int32_t _shiftAmt, 3927225Sgblack@eecs.umich.edu ArmShiftType _shiftType) 3937225Sgblack@eecs.umich.edu : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 3947232Sgblack@eecs.umich.edu _dest, _imm, _op1, _shiftAmt, _shiftType) 3957225Sgblack@eecs.umich.edu { 3967225Sgblack@eecs.umich.edu %(constructor)s; 3977848SAli.Saidi@ARM.com if (!(condCode == COND_AL || condCode == COND_UC)) { 3987848SAli.Saidi@ARM.com for (int x = 0; x < _numDestRegs; x++) { 3997848SAli.Saidi@ARM.com _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 4007848SAli.Saidi@ARM.com } 4017848SAli.Saidi@ARM.com } 4027225Sgblack@eecs.umich.edu } 4037225Sgblack@eecs.umich.edu}}; 4047609SGene.Wu@arm.com 4057609SGene.Wu@arm.comdef template ClrexDeclare {{ 4067609SGene.Wu@arm.com /** 4077609SGene.Wu@arm.com * Static instruction class for "%(mnemonic)s". 4087609SGene.Wu@arm.com */ 4097609SGene.Wu@arm.com class %(class_name)s : public %(base_class)s 4107609SGene.Wu@arm.com { 4117609SGene.Wu@arm.com public: 4127609SGene.Wu@arm.com 4137609SGene.Wu@arm.com /// Constructor. 4147609SGene.Wu@arm.com %(class_name)s(ExtMachInst machInst); 4157609SGene.Wu@arm.com 4167609SGene.Wu@arm.com %(BasicExecDeclare)s 4177609SGene.Wu@arm.com 4187609SGene.Wu@arm.com %(InitiateAccDeclare)s 4197609SGene.Wu@arm.com 4207609SGene.Wu@arm.com %(CompleteAccDeclare)s 4217609SGene.Wu@arm.com }; 4227609SGene.Wu@arm.com}}; 4237609SGene.Wu@arm.com 4247609SGene.Wu@arm.comdef template ClrexInitiateAcc {{ 4257609SGene.Wu@arm.com Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc, 4267609SGene.Wu@arm.com Trace::InstRecord *traceData) const 4277609SGene.Wu@arm.com { 4287609SGene.Wu@arm.com Fault fault = NoFault; 4297609SGene.Wu@arm.com %(op_decl)s; 4307609SGene.Wu@arm.com %(op_rd)s; 4317609SGene.Wu@arm.com 4327609SGene.Wu@arm.com if (%(predicate_test)s) 4337609SGene.Wu@arm.com { 4347609SGene.Wu@arm.com if (fault == NoFault) { 4357705Sgblack@eecs.umich.edu unsigned memAccessFlags = Request::CLEAR_LL | 4367705Sgblack@eecs.umich.edu ArmISA::TLB::AlignWord | Request::LLSC; 4377609SGene.Wu@arm.com fault = xc->read(0, (uint32_t&)Mem, memAccessFlags); 4387609SGene.Wu@arm.com } 4397609SGene.Wu@arm.com } else { 4407609SGene.Wu@arm.com xc->setPredicate(false); 4417609SGene.Wu@arm.com if (fault == NoFault && machInst.itstateMask != 0) { 4427609SGene.Wu@arm.com xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate); 4437609SGene.Wu@arm.com } 4447609SGene.Wu@arm.com } 4457609SGene.Wu@arm.com 4467609SGene.Wu@arm.com return fault; 4477609SGene.Wu@arm.com } 4487609SGene.Wu@arm.com}}; 4497609SGene.Wu@arm.com 4507609SGene.Wu@arm.comdef template ClrexCompleteAcc {{ 4517609SGene.Wu@arm.com Fault %(class_name)s::completeAcc(PacketPtr pkt, 4527609SGene.Wu@arm.com %(CPU_exec_context)s *xc, 4537609SGene.Wu@arm.com Trace::InstRecord *traceData) const 4547609SGene.Wu@arm.com { 4557712Sgblack@eecs.umich.edu if (machInst.itstateMask != 0) { 4567609SGene.Wu@arm.com xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate); 4577609SGene.Wu@arm.com } 4587609SGene.Wu@arm.com 4597712Sgblack@eecs.umich.edu return NoFault; 4607609SGene.Wu@arm.com } 4617609SGene.Wu@arm.com}}; 4627609SGene.Wu@arm.com 463