registers.hh revision 9920:028e4da64b42
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating
9 * to a hardware implementation of the functionality of the software
10 * licensed hereunder.  You may use the software subject to the license
11 * terms below provided that you ensure that this notice is replicated
12 * unmodified and in its entirety in all distributions of the software,
13 * modified or unmodified, in source code or in binary form.
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions are
17 * met: redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer;
19 * redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the distribution;
22 * neither the name of the copyright holders nor the names of its
23 * contributors may be used to endorse or promote products derived from
24 * this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
29 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
30 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
31 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
32 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 *
38 * Authors: Gabe Black
39 */
40
41#ifndef __ARCH_X86_REGISTERS_HH__
42#define __ARCH_X86_REGISTERS_HH__
43
44#include "arch/x86/generated/max_inst_regs.hh"
45#include "arch/x86/regs/int.hh"
46#include "arch/x86/regs/misc.hh"
47#include "arch/x86/x86_traits.hh"
48
49namespace X86ISA
50{
51using X86ISAInst::MaxInstSrcRegs;
52using X86ISAInst::MaxInstDestRegs;
53using X86ISAInst::MaxMiscDestRegs;
54const int NumMiscRegs = NUM_MISCREGS;
55
56const int NumIntArchRegs = NUM_INTREGS;
57const int NumIntRegs =
58    NumIntArchRegs + NumMicroIntRegs +
59    NumPseudoIntRegs + NumImplicitIntRegs;
60const int NumCCRegs = 0;
61
62// Each 128 bit xmm register is broken into two effective 64 bit registers.
63// Add 8 for the indices that are mapped over the fp stack
64const int NumFloatRegs =
65    NumMMXRegs + 2 * NumXMMRegs + NumMicroFpRegs + 8;
66
67// These enumerate all the registers for dependence tracking.
68enum DependenceTags {
69    // FP_Reg_Base must be large enough to be bigger than any integer
70    // register index which has the IntFoldBit (1 << 6) set.  To be safe
71    // we just start at (1 << 7) == 128.
72    FP_Reg_Base = 128,
73    CC_Reg_Base = FP_Reg_Base + NumFloatRegs,
74    Misc_Reg_Base = CC_Reg_Base + NumCCRegs, // NumCCRegs == 0
75    Max_Reg_Index = Misc_Reg_Base + NumMiscRegs
76};
77
78// semantically meaningful register indices
79//There is no such register in X86
80const int ZeroReg = NUM_INTREGS;
81const int StackPointerReg = INTREG_RSP;
82//X86 doesn't seem to have a link register
83const int ReturnAddressReg = 0;
84const int ReturnValueReg = INTREG_RAX;
85const int FramePointerReg = INTREG_RBP;
86
87// Some OS syscalls use a second register (rdx) to return a second
88// value
89const int SyscallPseudoReturnReg = INTREG_RDX;
90
91typedef uint64_t IntReg;
92typedef uint64_t CCReg;
93//XXX Should this be a 128 bit structure for XMM memory ops?
94typedef uint64_t LargestRead;
95typedef uint64_t MiscReg;
96
97//These floating point types are correct for mmx, but not
98//technically for x87 (80 bits) or at all for xmm (128 bits)
99typedef double FloatReg;
100typedef uint64_t FloatRegBits;
101typedef union
102{
103    IntReg intReg;
104    FloatReg fpReg;
105    MiscReg ctrlReg;
106} AnyReg;
107
108typedef uint16_t RegIndex;
109
110} // namespace X86ISA
111
112#endif // __ARCH_X86_REGFILE_HH__
113