registers.hh revision 9046
1/* 2 * Copyright (c) 2007 The Hewlett-Packard Development Company 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions are 16 * met: redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer; 18 * redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution; 21 * neither the name of the copyright holders nor the names of its 22 * contributors may be used to endorse or promote products derived from 23 * this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 * 37 * Authors: Gabe Black 38 */ 39 40#ifndef __ARCH_X86_REGISTERS_HH__ 41#define __ARCH_X86_REGISTERS_HH__ 42 43#include "arch/x86/generated/max_inst_regs.hh" 44#include "arch/x86/regs/int.hh" 45#include "arch/x86/regs/misc.hh" 46#include "arch/x86/x86_traits.hh" 47 48namespace X86ISA 49{ 50using X86ISAInst::MaxInstSrcRegs; 51using X86ISAInst::MaxInstDestRegs; 52using X86ISAInst::MaxMiscDestRegs; 53const int NumMiscArchRegs = NUM_MISCREGS; 54const int NumMiscRegs = NUM_MISCREGS; 55 56const int NumIntArchRegs = NUM_INTREGS; 57const int NumIntRegs = 58 NumIntArchRegs + NumMicroIntRegs + 59 NumPseudoIntRegs + NumImplicitIntRegs; 60 61//Each 128 bit xmm register is broken into two effective 64 bit registers. 62const int NumFloatRegs = 63 NumMMXRegs + 2 * NumXMMRegs + NumMicroFpRegs; 64const int NumFloatArchRegs = NumFloatRegs + 8; 65 66// These enumerate all the registers for dependence tracking. 67enum DependenceTags { 68 //There are 16 microcode registers at the moment. This is an 69 //unusually large constant to make sure there isn't overflow. 70 FP_Base_DepTag = 128, 71 Ctrl_Base_DepTag = 72 FP_Base_DepTag + 73 //mmx/x87 registers 74 8 + 75 //xmm registers 76 16 * 2 + 77 //The microcode fp registers 78 8 + 79 //The indices that are mapped over the fp stack 80 8, 81 Max_DepTag = Ctrl_Base_DepTag + NumMiscRegs 82}; 83 84// semantically meaningful register indices 85//There is no such register in X86 86const int ZeroReg = NUM_INTREGS; 87const int StackPointerReg = INTREG_RSP; 88//X86 doesn't seem to have a link register 89const int ReturnAddressReg = 0; 90const int ReturnValueReg = INTREG_RAX; 91const int FramePointerReg = INTREG_RBP; 92 93// Some OS syscalls use a second register (rdx) to return a second 94// value 95const int SyscallPseudoReturnReg = INTREG_RDX; 96 97typedef uint64_t IntReg; 98//XXX Should this be a 128 bit structure for XMM memory ops? 99typedef uint64_t LargestRead; 100typedef uint64_t MiscReg; 101 102//These floating point types are correct for mmx, but not 103//technically for x87 (80 bits) or at all for xmm (128 bits) 104typedef double FloatReg; 105typedef uint64_t FloatRegBits; 106typedef union 107{ 108 IntReg intReg; 109 FloatReg fpReg; 110 MiscReg ctrlReg; 111} AnyReg; 112 113typedef uint16_t RegIndex; 114 115} // namespace X86ISA 116 117#endif // __ARCH_X86_REGFILE_HH__ 118