CpuConfig.py revision 9891:19fa1dfd583f
1# Copyright (c) 2012 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated 10# unmodified and in its entirety in all distributions of the software, 11# modified or unmodified, in source code or in binary form. 12# 13# Redistribution and use in source and binary forms, with or without 14# modification, are permitted provided that the following conditions are 15# met: redistributions of source code must retain the above copyright 16# notice, this list of conditions and the following disclaimer; 17# redistributions in binary form must reproduce the above copyright 18# notice, this list of conditions and the following disclaimer in the 19# documentation and/or other materials provided with the distribution; 20# neither the name of the copyright holders nor the names of its 21# contributors may be used to endorse or promote products derived from 22# this software without specific prior written permission. 23# 24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35# 36# Authors: Andreas Sandberg 37 38import m5.objects 39import inspect 40import sys 41from textwrap import TextWrapper 42 43# Dictionary of mapping names of real CPU models to classes. 44_cpu_classes = {} 45 46# CPU aliases. The CPUs listed here might not be compiled, we make 47# sure they exist before we add them to the CPU list. A target may be 48# specified as a tuple, in which case the first available CPU model in 49# the tuple will be used as the target. 50_cpu_aliases_all = [ 51 ("timing", "TimingSimpleCPU"), 52 ("atomic", "AtomicSimpleCPU"), 53 ("inorder", "InOrderCPU"), 54 ("detailed", "DerivO3CPU"), 55 ("kvm", ("ArmKvmCPU", "X86KvmCPU")), 56 ] 57 58# Filtered list of aliases. Only aliases for existing CPUs exist in 59# this list. 60_cpu_aliases = {} 61 62 63def is_cpu_class(cls): 64 """Determine if a class is a CPU that can be instantiated""" 65 66 # We can't use the normal inspect.isclass because the ParamFactory 67 # and ProxyFactory classes have a tendency to confuse it. 68 try: 69 return issubclass(cls, m5.objects.BaseCPU) and \ 70 not cls.abstract and \ 71 not issubclass(cls, m5.objects.CheckerCPU) 72 except TypeError: 73 return False 74 75def get(name): 76 """Get a CPU class from a user provided class name or alias.""" 77 78 real_name = _cpu_aliases.get(name, name) 79 80 try: 81 cpu_class = _cpu_classes[real_name] 82 return cpu_class 83 except KeyError: 84 print "%s is not a valid CPU model." % (name,) 85 sys.exit(1) 86 87def print_cpu_list(): 88 """Print a list of available CPU classes including their aliases.""" 89 90 print "Available CPU classes:" 91 doc_wrapper = TextWrapper(initial_indent="\t\t", subsequent_indent="\t\t") 92 for name, cls in _cpu_classes.items(): 93 print "\t%s" % name 94 95 # Try to extract the class documentation from the class help 96 # string. 97 doc = inspect.getdoc(cls) 98 if doc: 99 for line in doc_wrapper.wrap(doc): 100 print line 101 102 if _cpu_aliases: 103 print "\nCPU aliases:" 104 for alias, target in _cpu_aliases.items(): 105 print "\t%s => %s" % (alias, target) 106 107def cpu_names(): 108 """Return a list of valid CPU names.""" 109 return _cpu_classes.keys() + _cpu_aliases.keys() 110 111# The ARM detailed CPU is special in the sense that it doesn't exist 112# in the normal object hierarchy, so we have to add it manually. 113try: 114 from O3_ARM_v7a import O3_ARM_v7a_3 115 _cpu_classes["arm_detailed"] = O3_ARM_v7a_3 116except: 117 pass 118 119# Add all CPUs in the object hierarchy. 120for name, cls in inspect.getmembers(m5.objects, is_cpu_class): 121 _cpu_classes[name] = cls 122 123for alias, target in _cpu_aliases_all: 124 if isinstance(target, tuple): 125 # Some aliases contain a list of CPU model sorted in priority 126 # order. Use the first target that's available. 127 for t in target: 128 if t in _cpu_classes: 129 _cpu_aliases[alias] = t 130 break 131 elif target in _cpu_classes: 132 # Normal alias 133 _cpu_aliases[alias] = target 134