Searched refs:MISCREG_ICC_IGRPEN1_EL1_NS (Results 1 - 3 of 3) sorted by relevance

/gem5/src/dev/arm/
H A Dgic_v3_cpu_interface.cc210 MISCREG_ICC_IGRPEN1_EL1_NS)).Enable;
1377 MISCREG_ICC_IGRPEN1_EL1_NS, icc_igrpen1_el3.EnableGrp1NS);
2315 isa->readMiscRegNoEffect(MISCREG_ICC_IGRPEN1_EL1_NS);
/gem5/src/arch/arm/
H A Dmiscregs.hh718 MISCREG_ICC_IGRPEN1_EL1_NS, enumerator in enum:ArmISA::MiscRegIndex
H A Dmiscregs.cc4651 InitReg(MISCREG_ICC_IGRPEN1_EL1_NS)

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