Searched refs:id (Results 1 - 25 of 242) sorted by relevance

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/gem5/ext/systemc/src/sysc/utils/
H A Dsc_stop_here.cpp50 sc_interrupt_here( const char* id, sc_severity severity ) argument
57 info_id = id;
60 warning_id = id;
63 error_id = id;
67 fatal_id = id;
81 sc_stop_here( const char* id, sc_severity severity ) argument
88 info_id = id;
91 warning_id = id;
94 error_id = id;
98 fatal_id = id;
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H A Dsc_stop_here.h54 sc_interrupt_here( const char* id, sc_severity severity );
65 sc_stop_here( const char* id, sc_severity severity );
H A Dsc_utils_ids.h39 #define SC_DEFINE_MESSAGE(id,unused1,unused2) \
40 namespace sc_core { extern const char id[]; }
95 // Andy Goodrich: Changed over to use a standard message id of
H A Dsc_utils_ids.cpp37 #define SC_DEFINE_MESSAGE(id,unused,text) extern const char id[] = text;
49 #define SC_DEFINE_MESSAGE(id,n,unused) \
50 { (id), 0u, {0u}, 0u, {0u}, 0u, 0u, {0u}, 0, n },
/gem5/ext/systemc/src/sysc/datatypes/int/
H A Dsc_int_ids.h64 #define SC_DEFINE_MESSAGE(id,unused1,unused2) \
65 namespace sc_core { extern const char id[]; }
/gem5/src/arch/arm/kvm/
H A Darm_cpu.hh74 const uint64_t id; member in struct:ArmKvmCPU::KvmIntRegInfo
83 const uint64_t id; member in struct:ArmKvmCPU::KvmCoreMiscRegInfo
107 ArmISA::MiscRegIndex decodeCoProcReg(uint64_t id) const;
109 ArmISA::MiscRegIndex decodeVFPCtrlReg(uint64_t id) const;
120 bool isInvariantReg(uint64_t id);
137 void dumpKvmStateCoProc(uint64_t id);
138 void dumpKvmStateVFP(uint64_t id);
142 void updateKvmStateCoProc(uint64_t id, bool show_warnings);
143 void updateKvmStateVFP(uint64_t id, bool show_warnings);
147 void updateTCStateCoProc(uint64_t id, boo
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H A Darm_cpu.cc60 #define REG_IS_ARM(id) \
61 (((id) & KVM_REG_ARCH_MASK) == KVM_REG_ARM)
63 #define REG_IS_32BIT(id) \
64 (((id) & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32)
66 #define REG_IS_64BIT(id) \
67 (((id) & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64)
69 #define REG_IS_CP(id, cp) \
70 (((id) & KVM_REG_ARM_COPROC_MASK) == (cp))
72 #define REG_IS_CORE(id) REG_IS_CP((id), KVM_REG_ARM_COR
435 isInvariantReg(uint64_t id) argument
523 dumpKvmStateCoProc(uint64_t id) argument
565 dumpKvmStateVFP(uint64_t id) argument
650 updateKvmStateCoProc(uint64_t id, bool show_warnings) argument
684 updateKvmStateVFP(uint64_t id, bool show_warnings) argument
789 updateTCStateCoProc(uint64_t id, bool show_warnings) argument
825 updateTCStateVFP(uint64_t id, bool show_warnings) argument
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/gem5/src/systemc/tests/systemc/communication/sc_signal/check_writer/test16/
H A Dtest16.cpp46 for(int id=1; id <= num_drivers; ++id) {
48 spawn_driver( id, (id-1) % (num_drivers-1) + 1 );
53 void spawn_driver(int id, int value) { argument
54 sc_assert( id > 0 && id <= num_drivers );
56 sp.set_sensitivity(&ev[id-1]);
61 nm << "p" << id; local
109 trigger(int id) argument
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/gem5/src/mem/ruby/network/garnet2.0/
H A DOutVcState.cc38 OutVcState::OutVcState(int id, GarnetNetwork *network_ptr) argument
41 m_id = id;
44 if (network_ptr->get_vnet_type(id) == DATA_VNET_)
/gem5/src/sim/power/
H A Dthermal_node.cc49 : SimObject(p), id(-1), isref(false), temp(0.0f)
H A Dthermal_node.hh57 int id; member in class:ThermalNode
/gem5/include/gem5/
H A Dm5ops.h71 void m5a_bsm(char *sm, const void *id, int flags);
75 void m5a_q(const void *id, char *q, int count);
76 void m5a_dq(const void *id, char *q, int count);
77 void m5a_wf(const void *id, char *q, char *sm, int count);
78 void m5a_we(const void *id, char *q, char *sm, int count);
79 void m5a_ws(const void *id, char *q, char *sm);
80 void m5a_sq(const void *id, char *q, int count, int flags);
81 void m5a_aq(const void *id, char *q, int count);
82 void m5a_pq(const void *id, char *q, int count);
83 void m5a_l(char *lsm, const void *id, cha
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/gem5/ext/drampower/src/
H A DParameter.cc46 Parameter::Parameter(const string& id, const string& type, argument
47 const string& value) : id(id), type(type), value(value)
53 return id;
99 Parameter Data::HexParameter(const string& id, int value) argument
105 return Parameter(id, "int", ss.str());
108 Parameter Data::StringParameter(const string& id, const string& value) argument
110 return Parameter(id, "string", value);
116 "id=\"" << parameter.getId() << "\" " <<
/gem5/ext/systemc/src/sysc/tracing/
H A Dsc_tracing_ids.h39 #define SC_DEFINE_MESSAGE(id,unused1,unused2) \
40 namespace sc_core { extern const char id[]; }
/gem5/src/systemc/tests/systemc/communication/sc_signal/check_writer/test15/
H A Dtest15.cpp46 for(int id=1; id <= num_drivers; ++id) {
48 spawn_driver( id, (id-1) % (num_drivers-1) + 1 );
53 void spawn_driver(int id, int value) { argument
54 sc_assert( id > 0 && id <= num_drivers );
56 sp.set_sensitivity(&ev[id-1]);
61 nm << "p" << id; local
138 trigger(int id) argument
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/gem5/src/mem/qos/
H A Dpolicy.hh93 * @param mId master id to schedule
117 auto id = memCtrl->system()->lookupMasterId(master); local
119 panic_if(id == Request::invldMasterId,
123 "Master %s [id %d] associated with QoS data %d\n",
124 master, id, value);
126 return std::pair<MasterID, T>(id, value);
/gem5/ext/googletest/googletest/test/
H A Dgtest_stress_test.cc64 std::string IdToKey(int id, const char* suffix) { argument
66 key << "key_" << id << "_" << suffix;
70 std::string IdToString(int id) { argument
72 id_message << id; local
78 int id, const char* suffix) {
79 TestPropertyKeyIs matches_key(IdToKey(id, suffix).c_str());
83 << "expecting " << suffix << " value for id " << id; local
84 EXPECT_STREQ(IdToString(id).c_str(), property->value());
89 void ManyAsserts(int id) { argument
76 ExpectKeyAndValueWereRecordedForId( const std::vector<TestProperty>& properties, int id, const char* suffix) argument
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/gem5/src/sim/
H A Dport.cc53 portName(_name), id(_id), _peer(nullptr), _connected(false)
/gem5/ext/libelf/
H A Dgelf_symshndx.c35 gelf_getsymshndx(Elf_Data *d, Elf_Data *id, int ndx, GElf_Sym *dst, argument
47 if (id == NULL || (scn = id->d_scn) == NULL ||
63 id->d_type != ELF_T_WORD) {
72 if (msz * ndx >= id->d_size) {
77 *shindex = ((Elf32_Word *) id->d_buf)[ndx];
83 gelf_update_symshndx(Elf_Data *d, Elf_Data *id, int ndx, GElf_Sym *gs, argument
95 if (id == NULL || (scn = id->d_scn) == NULL ||
118 if (msz * ndx >= id
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/gem5/ext/sst/
H A Dlibgem5.cc50 SST::Component* create_gem5(SST::ComponentId_t id, SST::Params &params) argument
52 return new SST::gem5::gem5Component(id, params);
/gem5/ext/systemc/src/sysc/communication/
H A Dsc_event_finder.cpp43 sc_event_finder::report_error( const char* id, const char* add_msg ) const argument
52 SC_REPORT_ERROR( id, msg );
/gem5/ext/systemc/src/sysc/datatypes/bit/
H A Dsc_bit_ids.h43 // Andy Goodrich: Changed over to use a standard message id of
69 #define SC_DEFINE_MESSAGE(id,unused1,unused2) \
70 namespace sc_core { extern const char id[]; }
/gem5/ext/systemc/src/sysc/datatypes/fx/
H A Dsc_fx_ids.h61 #define SC_DEFINE_MESSAGE(id,unused1,unused2) \
62 namespace sc_core { extern const char id[]; }
/gem5/src/arch/x86/
H A Dintmessage.hh80 prepIntRequest(const uint8_t id, Addr offset, Addr size) argument
83 x86InterruptAddress(id, offset),
94 buildIntRequest(const uint8_t id, T payload, Addr offset, Addr size) argument
96 PacketPtr pkt = prepIntRequest(id, offset, size);
102 buildIntRequest(const uint8_t id, TriggerIntMessage payload) argument
104 return buildIntRequest(id, payload, TriggerIntOffset,
/gem5/src/cpu/minor/
H A Ddyn_inst.cc63 operator <<(std::ostream &os, const InstId &id) argument
65 os << id.threadId << '/' << id.streamSeqNum << '.'
66 << id.predictionSeqNum << '/' << id.lineSeqNum;
69 if (id.fetchSeqNum != 0) {
70 os << '/' << id.fetchSeqNum;
71 if (id.execSeqNum != 0)
72 os << '.' << id.execSeqNum;
110 os << "F;" << id; local
112 os << "TF;" << id; local
114 os << id; local
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