History log of /gem5/src/arch/x86/intmessage.hh
Revision Date Author Comments
# 13229:b45254f2733a 12-Oct-2018 Gabe Black <gabeblack@google.com>

x86: Use little endian packet accessors.

We know data is little endian, so we can use those accessors
explicitly.

Change-Id: I09aa7f1e525ad1346e932ce4a772b64bf59dc350
Reviewed-on: https://gem5-review.googlesource.com/c/13456
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>


# 12749:223c83ed9979 04-Jun-2018 Giacomo Travaglini <giacomo.travaglini@arm.com>

misc: Using smart pointers for memory Requests

This patch is changing the underlying type for RequestPtr from Request*
to shared_ptr<Request>. Having memory requests being managed by smart
pointers will simplify the code; it will also prevent memory leakage and
dangling pointers.

Change-Id: I7749af38a11ac8eb4d53d8df1252951e0890fde3
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/10996
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>


# 8949:3fa1ee293096 14-Apr-2012 Andreas Hansson <andreas.hansson@arm.com>

MEM: Remove the Broadcast destination from the packet

This patch simplifies the packet by removing the broadcast flag and
instead more firmly relying on (and enforcing) the semantics of
transactions in the classic memory system, i.e. request packets are
routed from a master to a slave based on the address, and when they
are created they have neither a valid source, nor destination. On
their way to the slave, the request packet is updated with a source
field for all modules that multiplex packets from multiple master
(e.g. a bus). When a request packet is turned into a response packet
(at the final slave), it moves the potentially populated source field
to the destination field, and the response packet is routed through
any multiplexing components back to the master based on the
destination field.

Modules that connect multiplexing components, such as caches and
bridges store any existing source and destination field in the sender
state as a stack (just as before).

The packet constructor is simplified in that there is no longer a need
to pass the Packet::Broadcast as the destination (this was always the
case for the classic memory system). In the case of Ruby, rather than
using the parameter to the constructor we now rely on setDest, as
there is already another three-argument constructor in the packet
class.

In many places where the packet information was printed as part of
DPRINTFs, request packets would be printed with a numeric "dest" that
would always be -1 (Broadcast) and that field is now removed from the
printing.


# 8832:247fee427324 12-Feb-2012 Ali Saidi <Ali.Saidi@ARM.com>

mem: Add a master ID to each request object.

This change adds a master id to each request object which can be
used identify every device in the system that is capable of issuing a request.
This is part of the way to removing the numCpus+1 stats in the cache and
replacing them with the master ids. This is one of a series of changes
that make way for the stats output to be changed to python.


# 6216:2f4020838149 17-May-2009 Nathan Binkert <nate@binkert.org>

includes: sort includes again


# 6214:1ec0ec8933ae 17-May-2009 Nathan Binkert <nate@binkert.org>

types: Move stuff for global types into src/base/types.hh


# 6050:852ba59fa8d9 19-Apr-2009 Gabe Black <gblack@eecs.umich.edu>

X86: The startup IPI delivery mode is not reserved.


# 6046:8ac37d77fa74 19-Apr-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Start implementing the interrupt command register in the local APIC.


# 5736:426510e758ad 10-Nov-2008 Nathan Binkert <nate@binkert.org>

mem: update stuff for changes to Packet and Request


# 5655:74f76480407f 12-Oct-2008 Gabe Black <gblack@eecs.umich.edu>

X86: Make the local APIC process interrupts and send them to the CPU.


# 5654:340254de2031 12-Oct-2008 Gabe Black <gblack@eecs.umich.edu>

X86: Make the local APIC handle interrupt messages from the IO APIC.


# 5651:7f0c8006c3d7 12-Oct-2008 Gabe Black <gblack@eecs.umich.edu>

X86: Make APICs communicate through the memory system.