Searched hist:8181 (Results 1 - 12 of 12) sorted by relevance
/gem5/src/arch/mips/ | ||
H A D | isa.cc | diff 8181:f789b9aac5f4 Sat Mar 26 09:23:00 EDT 2011 Korey Sewell <ksewell@umich.edu> mips: cleanup ISA-specific code *** (1): get rid of expandForMT function MIPS is the only ISA that cares about having a piece of ISA state integrate multiple threads so add constants for MIPS and relieve the other ISAs from having to define this. Also, InOrder was the only core that was actively calling this function * * * (2): get rid of corespecific type The CoreSpecific type was used as a proxy to pass in HW specific params to a MIPS CPU, but since MIPS FS hasnt been touched for awhile, it makes sense to not force every other ISA to use CoreSpecific as well use a special reset function to set it. That probably should go in a PowerOn reset fault anyway. |
H A D | isa.hh | diff 8181:f789b9aac5f4 Sat Mar 26 09:23:00 EDT 2011 Korey Sewell <ksewell@umich.edu> mips: cleanup ISA-specific code *** (1): get rid of expandForMT function MIPS is the only ISA that cares about having a piece of ISA state integrate multiple threads so add constants for MIPS and relieve the other ISAs from having to define this. Also, InOrder was the only core that was actively calling this function * * * (2): get rid of corespecific type The CoreSpecific type was used as a proxy to pass in HW specific params to a MIPS CPU, but since MIPS FS hasnt been touched for awhile, it makes sense to not force every other ISA to use CoreSpecific as well use a special reset function to set it. That probably should go in a PowerOn reset fault anyway. |
H A D | types.hh | diff 8181:f789b9aac5f4 Sat Mar 26 09:23:00 EDT 2011 Korey Sewell <ksewell@umich.edu> mips: cleanup ISA-specific code *** (1): get rid of expandForMT function MIPS is the only ISA that cares about having a piece of ISA state integrate multiple threads so add constants for MIPS and relieve the other ISAs from having to define this. Also, InOrder was the only core that was actively calling this function * * * (2): get rid of corespecific type The CoreSpecific type was used as a proxy to pass in HW specific params to a MIPS CPU, but since MIPS FS hasnt been touched for awhile, it makes sense to not force every other ISA to use CoreSpecific as well use a special reset function to set it. That probably should go in a PowerOn reset fault anyway. |
/gem5/src/arch/power/ | ||
H A D | types.hh | diff 8181:f789b9aac5f4 Sat Mar 26 09:23:00 EDT 2011 Korey Sewell <ksewell@umich.edu> mips: cleanup ISA-specific code *** (1): get rid of expandForMT function MIPS is the only ISA that cares about having a piece of ISA state integrate multiple threads so add constants for MIPS and relieve the other ISAs from having to define this. Also, InOrder was the only core that was actively calling this function * * * (2): get rid of corespecific type The CoreSpecific type was used as a proxy to pass in HW specific params to a MIPS CPU, but since MIPS FS hasnt been touched for awhile, it makes sense to not force every other ISA to use CoreSpecific as well use a special reset function to set it. That probably should go in a PowerOn reset fault anyway. |
/gem5/src/arch/sparc/ | ||
H A D | types.hh | diff 8181:f789b9aac5f4 Sat Mar 26 09:23:00 EDT 2011 Korey Sewell <ksewell@umich.edu> mips: cleanup ISA-specific code *** (1): get rid of expandForMT function MIPS is the only ISA that cares about having a piece of ISA state integrate multiple threads so add constants for MIPS and relieve the other ISAs from having to define this. Also, InOrder was the only core that was actively calling this function * * * (2): get rid of corespecific type The CoreSpecific type was used as a proxy to pass in HW specific params to a MIPS CPU, but since MIPS FS hasnt been touched for awhile, it makes sense to not force every other ISA to use CoreSpecific as well use a special reset function to set it. That probably should go in a PowerOn reset fault anyway. |
/gem5/src/arch/alpha/ | ||
H A D | isa.hh | diff 8181:f789b9aac5f4 Sat Mar 26 09:23:00 EDT 2011 Korey Sewell <ksewell@umich.edu> mips: cleanup ISA-specific code *** (1): get rid of expandForMT function MIPS is the only ISA that cares about having a piece of ISA state integrate multiple threads so add constants for MIPS and relieve the other ISAs from having to define this. Also, InOrder was the only core that was actively calling this function * * * (2): get rid of corespecific type The CoreSpecific type was used as a proxy to pass in HW specific params to a MIPS CPU, but since MIPS FS hasnt been touched for awhile, it makes sense to not force every other ISA to use CoreSpecific as well use a special reset function to set it. That probably should go in a PowerOn reset fault anyway. |
H A D | types.hh | diff 8181:f789b9aac5f4 Sat Mar 26 09:23:00 EDT 2011 Korey Sewell <ksewell@umich.edu> mips: cleanup ISA-specific code *** (1): get rid of expandForMT function MIPS is the only ISA that cares about having a piece of ISA state integrate multiple threads so add constants for MIPS and relieve the other ISAs from having to define this. Also, InOrder was the only core that was actively calling this function * * * (2): get rid of corespecific type The CoreSpecific type was used as a proxy to pass in HW specific params to a MIPS CPU, but since MIPS FS hasnt been touched for awhile, it makes sense to not force every other ISA to use CoreSpecific as well use a special reset function to set it. That probably should go in a PowerOn reset fault anyway. |
/gem5/src/arch/x86/ | ||
H A D | types.hh | diff 8181:f789b9aac5f4 Sat Mar 26 09:23:00 EDT 2011 Korey Sewell <ksewell@umich.edu> mips: cleanup ISA-specific code *** (1): get rid of expandForMT function MIPS is the only ISA that cares about having a piece of ISA state integrate multiple threads so add constants for MIPS and relieve the other ISAs from having to define this. Also, InOrder was the only core that was actively calling this function * * * (2): get rid of corespecific type The CoreSpecific type was used as a proxy to pass in HW specific params to a MIPS CPU, but since MIPS FS hasnt been touched for awhile, it makes sense to not force every other ISA to use CoreSpecific as well use a special reset function to set it. That probably should go in a PowerOn reset fault anyway. |
/gem5/src/arch/arm/ | ||
H A D | types.hh | diff 8181:f789b9aac5f4 Sat Mar 26 09:23:00 EDT 2011 Korey Sewell <ksewell@umich.edu> mips: cleanup ISA-specific code *** (1): get rid of expandForMT function MIPS is the only ISA that cares about having a piece of ISA state integrate multiple threads so add constants for MIPS and relieve the other ISAs from having to define this. Also, InOrder was the only core that was actively calling this function * * * (2): get rid of corespecific type The CoreSpecific type was used as a proxy to pass in HW specific params to a MIPS CPU, but since MIPS FS hasnt been touched for awhile, it makes sense to not force every other ISA to use CoreSpecific as well use a special reset function to set it. That probably should go in a PowerOn reset fault anyway. |
/gem5/src/cpu/ | ||
H A D | BaseCPU.py | diff 8181:f789b9aac5f4 Sat Mar 26 09:23:00 EDT 2011 Korey Sewell <ksewell@umich.edu> mips: cleanup ISA-specific code *** (1): get rid of expandForMT function MIPS is the only ISA that cares about having a piece of ISA state integrate multiple threads so add constants for MIPS and relieve the other ISAs from having to define this. Also, InOrder was the only core that was actively calling this function * * * (2): get rid of corespecific type The CoreSpecific type was used as a proxy to pass in HW specific params to a MIPS CPU, but since MIPS FS hasnt been touched for awhile, it makes sense to not force every other ISA to use CoreSpecific as well use a special reset function to set it. That probably should go in a PowerOn reset fault anyway. |
H A D | base.hh | diff 8181:f789b9aac5f4 Sat Mar 26 09:23:00 EDT 2011 Korey Sewell <ksewell@umich.edu> mips: cleanup ISA-specific code *** (1): get rid of expandForMT function MIPS is the only ISA that cares about having a piece of ISA state integrate multiple threads so add constants for MIPS and relieve the other ISAs from having to define this. Also, InOrder was the only core that was actively calling this function * * * (2): get rid of corespecific type The CoreSpecific type was used as a proxy to pass in HW specific params to a MIPS CPU, but since MIPS FS hasnt been touched for awhile, it makes sense to not force every other ISA to use CoreSpecific as well use a special reset function to set it. That probably should go in a PowerOn reset fault anyway. |
/gem5/src/cpu/simple/ | ||
H A D | timing.cc | diff 12769:f9c0d0a09dac Mon Apr 02 15:18:00 EDT 2018 Tuan Ta <qtt2@cornell.edu> cpu: Prevent suspended TimingSimple CPUs from fetching next instructions In TimingSimpleCPU model, when a CPU is suspended by a syscall (e.g., futex(FUTEX_WAIT)), the CPU waits for another CPU to wake it up (e.g., FUTEX_WAKE operation). While staying Idle, the suspended CPU should not try to fetch next instructions after the syscall. This patch added a status check before a CPU schedule a fetch event after a fault is handled. Change-Id: I0cc953135686c9b35afe94942aa1d0b245ec60a2 Reviewed-on: https://gem5-review.googlesource.com/8181 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Brandon Potter <Brandon.Potter@amd.com> |
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