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| /gem5/src/cpu/o3/ | ||
| H A D | inst_queue.hh | diff 10511:e57f5bffc553 Thu Oct 30 00:18:00 EDT 2014 Mitch Hayenga <mitch.hayenga@arm.com> cpu: Add writeback modeling for drain functionality It is possible for the O3 CPU to consider itself drained and later have a squashed instruction perform a writeback. This patch re-adds tracking of in-flight instructions to prevent falsely signaling a drained event. |
| H A D | inst_queue_impl.hh | diff 10511:e57f5bffc553 Thu Oct 30 00:18:00 EDT 2014 Mitch Hayenga <mitch.hayenga@arm.com> cpu: Add writeback modeling for drain functionality It is possible for the O3 CPU to consider itself drained and later have a squashed instruction perform a writeback. This patch re-adds tracking of in-flight instructions to prevent falsely signaling a drained event. |
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