| /gem5/src/dev/i2c/ |
| H A D | device.hh | 57 uint8_t _addr; member in class:I2CDevice
|
| /gem5/src/arch/arm/tracers/ |
| H A D | tarmac_base.cc | 90 MemEntry( uint8_t _size, Addr _addr, uint64_t _data) argument
|
| H A D | tarmac_record_v8.cc | 63 TraceMemEntryV8( const TarmacContext& tarmCtx, uint8_t _size, Addr _addr, uint64_t _data) argument
|
| H A D | tarmac_record.cc | 143 TraceMemEntry( const TarmacContext& tarmCtx, uint8_t _size, Addr _addr, uint64_t _data) argument
|
| /gem5/src/sim/ |
| H A D | syscall_emul_buf.hh | 64 BaseBufferArg(Addr _addr, int _size) argument
112 BufferArg(Addr _addr, int _size) : BaseBufferArg(_addr, _size) { } argument
139 TypedBufferArg(Addr _addr, int _size = sizeof(T)) argument
|
| /gem5/src/arch/riscv/ |
| H A D | faults.hh | 202 const Addr _addr; member in class:RiscvISA::AddressFault
|
| /gem5/src/arch/arm/ |
| H A D | tlbi_op.hh | 250 TLBIIPA(ExceptionLevel _targetEL, bool _secure, Addr _addr) argument
183 TLBIMVAA(ExceptionLevel _targetEL, bool _secure, Addr _addr) argument
198 TLBIMVA(ExceptionLevel _targetEL, bool _secure, Addr _addr, uint16_t _asid) argument
214 ITLBIMVA(ExceptionLevel _targetEL, bool _secure, Addr _addr, uint16_t _asid) argument
232 DTLBIMVA(ExceptionLevel _targetEL, bool _secure, Addr _addr, uint16_t _asid) argument
[all...] |
| H A D | faults.hh | 463 PrefetchAbort(Addr _addr, uint8_t _source, bool _stage2 = false, argument
490 DataAbort(Addr _addr, TlbEntry::DomainType _domain, bool _write, uint8_t _source, argument
512 VirtualDataAbort(Addr _addr, TlbEntry::DomainType _domain, bool _write, argument
|
| /gem5/src/arch/x86/ |
| H A D | faults.hh | 318 PageFault(Addr _addr, uint32_t _errorCode) : argument
322 PageFault(Addr _addr, bool present, BaseTLB::Mode mode, argument
|
| /gem5/src/mem/ |
| H A D | abstract_mem.hh | 96 LockedAddr(Addr _addr, int _cid) : addr(_addr), contextId(_cid) argument
|
| H A D | dram_ctrl.hh | 734 DRAMPacket(PacketPtr _pkt, bool is_read, uint8_t _rank, uint8_t _bank, uint32_t _row, uint16_t bank_id, Addr _addr, unsigned int _size, Bank& bank_ref, Rank& rank_ref) argument
|
| H A D | packet.hh | 736 void setAddr(Addr _addr) { assert(flags.isSet(VALID_ADDR)); addr = _addr; } argument
|
| /gem5/src/mem/cache/ |
| H A D | cache_blk.hh | 448 Addr _addr; member in class:final
|
| /gem5/src/gpu-compute/ |
| H A D | gpu_tlb.cc | 1113 GpuTLB::TLBEvent::TLBEvent(GpuTLB* _tlb, Addr _addr, tlbOutcome tlb_outcome, argument
|
| /gem5/src/cpu/o3/ |
| H A D | lsq.hh | 297 const Addr _addr; variable
|