Searched refs:sid (Results 1 - 14 of 14) sorted by relevance

/gem5/src/base/
H A Dcp_annotate.cc189 StackId sid = StackId(sysi, frame); local
194 if (smStack[sid].size()) {
195 int prev_smi = smStack[sid].back();
213 smStack[sid].push_back(smi);
216 for (int x = smStack[sid].size()-1; x >= 0; x--)
217 DPRINTF(Annotate, "-- %d\n", smStack[sid][x]);
220 if (swExpl[sid])
221 swExpl[sid] = false;
268 StackId sid = StackId(sysi, frame); local
272 if (swExpl[sid])
374 StackId sid = StackId(sysi, frame); local
406 StackId sid = StackId(sysi, getFrame(tc)); local
436 StackId sid = StackId(sysi, getFrame(tc)); local
467 StackId sid = StackId(sysi, getFrame(tc)); local
496 StackId sid = StackId(sysi, getFrame(tc)); local
531 StackId sid = StackId(sysi, getFrame(tc)); local
562 StackId sid = StackId(sysi, getFrame(tc)); local
590 StackId sid = StackId(sysi, getFrame(tc)); local
620 StackId sid = StackId(sysi, getFrame(tc)); local
722 StackId sid = StackId(sysi, getFrame(tc)); local
754 StackId sid = StackId(sysi, getFrame(tc)); local
772 StackId sid = StackId(sysi, getFrame(tc)); local
798 StackId sid = StackId(sysi, getFrame(tc)); local
1307 StackId sid = StackId(sysi, frame); local
1334 StackId sid = StackId(sysi, frame); local
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/gem5/src/dev/arm/
H A Dsmmu_v3_caches.hh108 uint32_t sid; member in struct:SMMUTLB::Entry
127 const Entry *lookup(uint32_t sid, uint32_t ssid, Addr va,
129 const Entry *lookupAnyVA(uint32_t sid, uint32_t ssid,
133 void invalidateSSID(uint32_t sid, uint32_t ssid);
134 void invalidateSID(uint32_t sid);
147 size_t pickSetIdx(uint32_t sid, uint32_t ssid) const;
245 uint32_t sid; member in struct:ConfigCache::Entry
266 const Entry *lookup(uint32_t sid, uint32_t ssid, bool updStats=true);
269 void invalidateSSID(uint32_t sid, uint32_t ssid);
270 void invalidateSID(uint32_t sid);
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H A Dsmmu_v3_transl.hh52 uint32_t sid; // streamId member in struct:SMMUTranslRequest
61 static SMMUTranslRequest prefetch(Addr addr, uint32_t sid, uint32_t ssid);
168 void doReadSTE(Yield &yield, StreamTableEntry &ste, uint32_t sid);
170 const StreamTableEntry &ste, uint32_t sid, uint32_t ssid);
172 uint32_t sid, uint32_t ssid);
H A Dsmmu_v3_caches.cc179 SMMUTLB::lookup(uint32_t sid, uint32_t ssid, argument
190 e.sid==sid && e.ssid==ssid)
213 SMMUTLB::lookupAnyVA(uint32_t sid, uint32_t ssid, bool updStats) argument
223 if (e.valid && e.sid==sid && e.ssid==ssid) {
248 lookup(incoming.sid, incoming.ssid, incoming.va, false);
261 SMMUTLB::invalidateSSID(uint32_t sid, uint32_t ssid) argument
263 Set &set = sets[pickSetIdx(sid, ssid)];
268 if (e.sid
274 invalidateSID(uint32_t sid) argument
365 pickSetIdx(uint32_t sid, uint32_t ssid) const argument
838 lookup(uint32_t sid, uint32_t ssid, bool updStats) argument
890 invalidateSSID(uint32_t sid, uint32_t ssid) argument
903 invalidateSID(uint32_t sid) argument
929 pickSetIdx(uint32_t sid, uint32_t ssid) const argument
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H A Dsmmu_v3_transl.cc54 req.sid = pkt->req->streamId();
66 SMMUTranslRequest::prefetch(Addr addr, uint32_t sid, uint32_t ssid) argument
71 req.sid = sid;
318 ifc.microTLB->lookup(request.sid, request.ssid, request.addr);
322 DPRINTF(SMMUv3, "micro TLB miss vaddr=%#x sid=%#x ssid=%#x\n",
323 request.addr, request.sid, request.ssid);
329 "micro TLB hit vaddr=%#x amask=%#x sid=%#x ssid=%#x paddr=%#x\n",
330 request.addr, e->vaMask, request.sid, request.ssid, e->pa);
350 ifc.mainTLB->lookup(request.sid, reques
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H A Dsmmu_v3.cc396 DPRINTF(SMMUv3, "CMD_CFGI_STE sid=%#x\n", cmd.dw0.sid);
397 configCache.invalidateSID(cmd.dw0.sid);
400 slave_interface->microTLB->invalidateSID(cmd.dw0.sid);
401 slave_interface->mainTLB->invalidateSID(cmd.dw0.sid);
420 const auto start_sid = cmd.dw0.sid & ~((1 << (range + 1)) - 1);
422 for (auto sid = start_sid; sid <= end_sid; sid++) {
423 configCache.invalidateSID(sid);
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H A Dsmmu_v3_defs.hh359 Bitfield<63, 32> sid; member in struct:SMMUCommand
/gem5/src/dev/
H A DDevice.py89 sid = Param.Unsigned(0, variable in class:DmaDevice
106 [ state.phandle(self._iommu), self.sid ]))
H A Ddma_device.hh153 uint32_t sid = 0, uint32_t ssid = 0);
161 uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay,
180 uint32_t sid, uint32_t ssid, Tick delay = 0)
183 sid, ssid, delay);
193 uint32_t sid, uint32_t ssid, Tick delay = 0)
196 sid, ssid, delay);
179 dmaWrite(Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay = 0) argument
192 dmaRead(Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay = 0) argument
H A Ddma_device.cc58 uint32_t sid, uint32_t ssid)
63 defaultSid(sid),
123 : PioDevice(p), dmaPort(this, sys, p->sid, p->ssid)
154 uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay,
176 req->setStreamId(sid);
57 DmaPort(ClockedObject *dev, System *s, uint32_t sid, uint32_t ssid) argument
153 dmaAction(Packet::Command cmd, Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay, Request::Flags flag) argument
/gem5/src/mem/ruby/network/simple/
H A DPerfectSwitch.hh62 PerfectSwitch(SwitchID sid, Switch *, uint32_t);
H A DPerfectSwitch.cc52 PerfectSwitch::PerfectSwitch(SwitchID sid, Switch *sw, uint32_t virt_nets) argument
53 : Consumer(sw), m_switch_id(sid), m_switch(sw)
/gem5/src/cpu/testers/traffic_gen/
H A Dbase.cc186 auto sid = streamGenerator->pickStreamID(); local
189 pkt->req->setStreamId(sid);
/gem5/src/mem/
H A Drequest.hh510 setStreamId(uint32_t sid) argument
512 _streamId = sid;

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