1/* 2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29/* 30 * Perfect switch, of course it is perfect and no latency or what so 31 * ever. Every cycle it is woke up and perform all the necessary 32 * routings that must be done. Note, this switch also has number of 33 * input ports/output ports and has a routing table as well. 34 */ 35 36#ifndef __MEM_RUBY_NETWORK_SIMPLE_PERFECTSWITCH_HH__ 37#define __MEM_RUBY_NETWORK_SIMPLE_PERFECTSWITCH_HH__ 38 39#include <iostream> 40#include <string> 41#include <vector> 42 43#include "mem/ruby/common/Consumer.hh" 44#include "mem/ruby/common/TypeDefines.hh" 45 46class MessageBuffer; 47class NetDest; 48class SimpleNetwork; 49class Switch; 50 51struct LinkOrder 52{ 53 int m_link; 54 int m_value; 55}; 56 57bool operator<(const LinkOrder& l1, const LinkOrder& l2); 58 59class PerfectSwitch : public Consumer 60{ 61 public: 62 PerfectSwitch(SwitchID sid, Switch *, uint32_t); 63 ~PerfectSwitch(); 64 65 std::string name() 66 { return csprintf("PerfectSwitch-%i", m_switch_id); } 67 68 void init(SimpleNetwork *); 69 void addInPort(const std::vector<MessageBuffer*>& in); 70 void addOutPort(const std::vector<MessageBuffer*>& out, 71 const NetDest& routing_table_entry); 72 73 int getInLinks() const { return m_in.size(); } 74 int getOutLinks() const { return m_out.size(); } 75 76 void wakeup(); 77 void storeEventInfo(int info); 78 79 void clearStats(); 80 void collateStats(); 81 void print(std::ostream& out) const; 82 83 private: 84 // Private copy constructor and assignment operator 85 PerfectSwitch(const PerfectSwitch& obj); 86 PerfectSwitch& operator=(const PerfectSwitch& obj); 87 88 void operateVnet(int vnet); 89 void operateMessageBuffer(MessageBuffer *b, int incoming, int vnet); 90 91 const SwitchID m_switch_id; 92 Switch * const m_switch; 93 94 // vector of queues from the components 95 std::vector<std::vector<MessageBuffer*> > m_in; 96 std::vector<std::vector<MessageBuffer*> > m_out; 97 98 std::vector<NetDest> m_routing_table; 99 std::vector<LinkOrder> m_link_order; 100 101 uint32_t m_virtual_networks; 102 int m_round_robin_start; 103 int m_wakeups_wo_switch; 104 105 SimpleNetwork* m_network_ptr; 106 std::vector<int> m_pending_message_count; 107}; 108 109inline std::ostream& 110operator<<(std::ostream& out, const PerfectSwitch& obj) 111{ 112 obj.print(out); 113 out << std::flush; 114 return out; 115} 116 117#endif // __MEM_RUBY_NETWORK_SIMPLE_PERFECTSWITCH_HH__ 118