Searched refs:_size (Results 1 - 25 of 43) sorted by relevance

12

/gem5/src/sim/
H A Dsyscall_emul_buf.hh64 BaseBufferArg(Addr _addr, int _size) argument
65 : addr(_addr), size(_size), bufPtr(new uint8_t[size])
112 BufferArg(Addr _addr, int _size) : BaseBufferArg(_addr, _size) { } argument
139 TypedBufferArg(Addr _addr, int _size = sizeof(T))
140 : BaseBufferArg(_addr, _size)
/gem5/src/gpu-compute/
H A Dvector_register_state.cc56 VecRegisterState::init(uint32_t _size, uint32_t wf_size) argument
58 s_reg.resize(_size);
67 d_reg.resize(_size);
H A Dcondition_register_state.cc58 ConditionRegisterState::init(uint32_t _size) argument
60 c_reg.resize(_size);
61 busy.resize(_size, 0);
H A Dvector_register_state.hh54 void init(uint32_t _size, uint32_t wf_size);
H A Dcondition_register_state.hh54 void init(uint32_t _size);
/gem5/src/dev/net/
H A Dpktfifo.hh90 unsigned _size; member in class:PacketFifo
95 : _counter(0), _maxsize(max), _size(0), _reserved(0) {}
100 unsigned size() const { return _size; }
102 unsigned avail() const { return _maxsize - _size - _reserved; }
129 _size += ptr->length;
145 _size -= entry->packet->length;
146 _size -= entry->slack;
156 _size = 0;
169 _size -= i->packet->length;
170 _size
[all...]
H A Detherswitch.hh139 unsigned _size; member in class:EtherSwitch::Interface::PortFifo
143 :objName(name), _maxsize(max), _size(0) {}
152 int avail() const { return _maxsize - _size; }
155 bool empty() const { return _size == 0; }
156 unsigned size() const { return _size; }
H A Dpktfifo.cc90 paramOut(cp, base + ".size", _size);
103 paramIn(cp, base + ".size", _size);
H A Detherswitch.cc81 _size += ptr->length;
89 _size -= std::prev(fifo.end())->packet->length;
114 assert(_size >= fifo.begin()->packet->length);
116 _size -= fifo.begin()->packet->length;
124 _size = 0;
323 SERIALIZE_SCALAR(_size);
336 UNSERIALIZE_SCALAR(_size);
/gem5/src/mem/cache/tags/
H A Dsuper_blk.cc42 : SectorSubBlk(), _size(0), _decompressionLatency(0)
67 return _size;
73 _size = size;
H A Dsuper_blk.hh56 std::size_t _size; member in class:CompressionBlk
/gem5/src/systemc/core/
H A Dport.hh59 int _size; member in class:sc_gem5::Port
71 _size++;
131 portBase(port_base), finalized(false), _maxSize(max), _size(0),
161 int size() { return _size; }
162 int maxSize() { return _maxSize ? _maxSize : _size; }
/gem5/src/arch/arm/linux/
H A Datag.hh61 uint32_t _size; member in class:AtagHeader
69 uint32_t size() const { return _size; }
72 : _size(s)
155 _size = 2 + ((len + 3) >> 2);
/gem5/src/arch/x86/
H A Dtypes.hh294 uint8_t _size; member in class:X86ISA::PCState
301 _size = 0;
311 _size = 0;
314 uint8_t size() const { return _size; }
315 void size(uint8_t newSize) { _size = newSize; }
328 _size = 0;
335 _size = 0;
342 SERIALIZE_SCALAR(_size);
349 UNSERIALIZE_SCALAR(_size);
H A Dtlb.cc483 uint32_t _size = size - freeList.size(); local
484 SERIALIZE_SCALAR(_size);
498 uint32_t _size; local
499 UNSERIALIZE_SCALAR(_size);
500 if (_size > size) {
506 for (uint32_t x = 0; x < _size; x++) {
/gem5/src/mem/cache/compressors/
H A Dbase.cc49 : _size(0)
60 _size = size;
66 return _size;
72 return std::ceil(_size/8);
H A Dbase.hh164 std::size_t _size; member in class:BaseCacheCompressor::CompressionData
/gem5/src/arch/arm/tracers/
H A Dtarmac_base.cc91 uint8_t _size,
94 : size(_size), addr(_addr), data(_data)
90 MemEntry( uint8_t _size, Addr _addr, uint64_t _data) argument
H A Dtarmac_base.hh117 MemEntry(uint8_t _size, Addr _addr, uint64_t _data);
H A Dtarmac_record_v8.cc65 uint8_t _size, Addr _addr, uint64_t _data)
66 : TraceMemEntry(tarmCtx, _size, _addr, _data),
63 TraceMemEntryV8( const TarmacContext& tarmCtx, uint8_t _size, Addr _addr, uint64_t _data) argument
/gem5/src/mem/
H A Drequest.hh298 _size = size;
321 unsigned _size; variable
402 : _paddr(0), _size(0), _masterId(invldMasterId), _time(0),
411 : _paddr(0), _size(0), _masterId(invldMasterId), _time(0),
428 : _paddr(0), _size(0), _masterId(invldMasterId), _time(0),
438 : _paddr(0), _size(0), _masterId(invldMasterId), _time(0),
449 : _paddr(0), _size(0), _masterId(invldMasterId), _time(0),
461 : _paddr(0), _size(0), _masterId(invldMasterId), _time(0),
480 : _paddr(other._paddr), _size(other._size),
[all...]
/gem5/src/systemc/ext/channel/
H A Dsc_fifo.hh58 _size(size), _num_free(size), _num_available(0),
64 sc_prim_channel(name), _size(size), _num_free(size),
186 _num_free = _size - _num_available;
209 int _size; member in class:sc_core::sc_fifo
/gem5/src/cpu/kvm/
H A Dperfevent.cc235 size_t _size = size; local
241 ret = ::read(fd, _buf, _size);
252 _size -= ret;
256 } while (_size);
/gem5/src/arch/arm/
H A Dtypes.hh231 uint8_t _size; member in class:ArmISA::PCState
235 _size(0), _illegalExec(false)
246 _nextItstate(0), _size(0), _illegalExec(false)
291 void size(uint8_t s) { _size = s; }
292 uint8_t size() const { return _size; }
510 SERIALIZE_SCALAR(_size); variable
522 UNSERIALIZE_SCALAR(_size); variable
/gem5/src/systemc/ext/utils/
H A Dsc_vector.hh451 sc_vector(const char *_name, size_type _size) : sc_vector_base(_name) argument
453 init(_size);
456 sc_vector(const char *_name, size_type _size, Creator creator) : argument
459 init(_size, creator);
464 init(size_type _size) argument
466 init(_size, &sc_vector<T>::create_element);
476 init(size_type _size, Creator creator) argument
480 for (size_type i = 0; i < _size; i++) {

Completed in 37 milliseconds

12