| /gem5/src/dev/ |
| H A D | mc146818.cc | 96 : EventManager(em), _name(n), event(this, frequency), tickEvent(this)
115 deschedule(tickEvent);
130 assert(!tickEvent.scheduled());
135 schedule(tickEvent, curTick() + tickEvent.offset);
176 if (tickEvent.scheduled())
177 deschedule(tickEvent);
183 assert(!tickEvent.scheduled());
184 schedule(tickEvent, curTick() + SimClock::Int::s / 2);
284 Tick rtcClockTickOffset = tickEvent
[all...] |
| H A D | mc146818.hh | 94 RTCTickEvent tickEvent; member in class:MC146818
|
| /gem5/src/gpu-compute/ |
| H A D | dispatcher.cc | 56 tickEvent([this]{ exec(); }, "GPU Dispatcher tick",
65 schedule(&tickEvent, 0);
92 if (tickEvent.scheduled())
93 event_tick = tickEvent.when();
104 if (tickEvent.scheduled())
105 deschedule(&tickEvent);
110 schedule(&tickEvent, event_tick);
236 if (!tickEvent.scheduled()) {
237 schedule(&tickEvent, curTick() + shader->ticks(1));
342 if (!tickEvent
[all...] |
| H A D | lds_state.cc | 52 tickEvent(this),
236 if (!tickEvent.scheduled()) {
311 if (tickEvent.scheduled()) {
313 if (next < tickEvent.when()) {
315 tickEvent.deschedule();
316 tickEvent.schedule(next);
319 tickEvent.schedule(next);
|
| H A D | shader.cc | 56 tickEvent([this]{ processTick(); }, "Shader tick",
192 if (!tickEvent.scheduled()) {
193 schedule(tickEvent, curTick() + this->ticks(1));
329 schedule(tickEvent, curTick() + ticks(1));
|
| H A D | dispatcher.hh | 87 EventFunctionWrapper tickEvent; member in class:GpuDispatcher
|
| H A D | shader.hh | 103 EventFunctionWrapper tickEvent; member in class:Shader
|
| H A D | lds_state.hh | 225 TickEvent tickEvent; member in class:LdsState
|
| /gem5/src/cpu/simple/ |
| H A D | atomic.cc | 81 tickEvent([this]{ tick(); }, "AtomicSimpleCPU tick",
101 if (tickEvent.scheduled()) {
102 deschedule(tickEvent);
119 if (tickEvent.scheduled())
120 deschedule(tickEvent);
149 assert(!tickEvent.scheduled());
167 if (!tickEvent.scheduled()) {
168 schedule(tickEvent, nextCycle());
201 assert(!tickEvent.scheduled());
213 assert(!tickEvent
[all...] |
| H A D | timing.hh | 192 tickEvent(_cpu)
210 ITickEvent tickEvent; member in class:TimingSimpleCPU::IcachePort
220 tickEvent(_cpu)
250 DTickEvent tickEvent; member in class:TimingSimpleCPU::DcachePort
|
| H A D | atomic.hh | 63 EventFunctionWrapper tickEvent; member in class:AtomicSimpleCPU
|
| H A D | timing.cc | 856 assert(!tickEvent.scheduled());
858 tickEvent.schedule(pkt, cpu->clockEdge());
983 if (!tickEvent.scheduled()) {
985 tickEvent.schedule(pkt, cpu->clockEdge());
|
| /gem5/src/cpu/kvm/ |
| H A D | base.cc | 77 tickEvent([this]{ tick(); }, "BaseKvmCPU tick",
234 assert(!tickEvent.scheduled());
237 schedule(tickEvent, nextCycle());
380 if (tickEvent.scheduled())
381 deschedule(tickEvent);
387 assert(!tickEvent.scheduled());
426 assert(!tickEvent.scheduled());
439 schedule(tickEvent, nextCycle());
451 assert(!tickEvent.scheduled());
479 assert(!tickEvent
[all...] |
| H A D | base.hh | 707 EventFunctionWrapper tickEvent; member in class:BaseKvmCPU
|
| /gem5/src/mem/ |
| H A D | dramsim2.hh | 161 EventFunctionWrapper tickEvent; member in class:DRAMSim2
|
| H A D | dramsim2.cc | 57 tickEvent([this]{ tick(); }, name())
100 schedule(tickEvent, clockEdge());
151 schedule(tickEvent, curTick() + wrapper.clockPeriod() * SimClock::Int::ns);
|
| /gem5/src/cpu/testers/memtest/ |
| H A D | memtest.cc | 88 tickEvent([this]{ tick(); }, name()),
121 schedule(tickEvent, curTick());
301 schedule(tickEvent, clockEdge(interval));
336 schedule(tickEvent, clockEdge(interval));
|
| H A D | memtest.hh | 88 EventFunctionWrapper tickEvent; member in class:MemTest
|
| /gem5/src/cpu/testers/garnet_synthetic_traffic/ |
| H A D | GarnetSyntheticTraffic.cc | 78 tickEvent([this]{ tick(); }, "GarnetSyntheticTraffic tick",
99 schedule(tickEvent, 0);
179 if (!tickEvent.scheduled())
180 schedule(tickEvent, clockEdge(Cycles(1)));
|
| H A D | GarnetSyntheticTraffic.hh | 77 EventFunctionWrapper tickEvent; member in class:GarnetSyntheticTraffic
|
| /gem5/src/cpu/o3/ |
| H A D | cpu.hh | 137 EventFunctionWrapper tickEvent; member in class:FullO3CPU
145 if (tickEvent.squashed())
146 reschedule(tickEvent, clockEdge(delay));
147 else if (!tickEvent.scheduled())
148 schedule(tickEvent, clockEdge(delay));
154 if (tickEvent.scheduled())
155 tickEvent.squash();
|
| H A D | cpu.cc | 98 tickEvent([this]{ tick(); }, "FullO3CPU tick",
567 if (!tickEvent.scheduled()) {
577 schedule(tickEvent, clockEdge(Cycles(1)));
996 if (tickEvent.scheduled())
997 deschedule(tickEvent);
1023 if (tickEvent.scheduled())
1024 deschedule(tickEvent);
1112 assert(!tickEvent.scheduled());
1114 schedule(tickEvent, nextCycle());
1147 assert(!tickEvent
[all...] |
| /gem5/src/dev/net/ |
| H A D | i8254xGBe.hh | 134 EventFunctionWrapper tickEvent; member in class:IGbE
|
| H A D | i8254xGBe.cc | 71 tickEvent([this]{ tick(); }, name()),
2075 if (!tickEvent.scheduled() && (rxTick || txTick || txFifoTick) &&
2077 schedule(tickEvent, clockEdge(Cycles(1)));
2093 if (tickEvent.scheduled())
2094 deschedule(tickEvent);
2252 if ((rxTick || txTick) && !tickEvent.scheduled()) {
2457 schedule(tickEvent, curTick() + clockPeriod());
|