Searched refs:pmu (Results 1 - 7 of 7) sorted by relevance

/gem5/src/arch/arm/
H A DArmPMU.py48 def __init__(self, pmu, _eventId, obj, *listOfNames):
52 self.pmu = pmu
57 self.pmu.getCCObject().addEventProbe(self.eventId,
61 def __init__(self,pmu, _eventId):
63 self.pmu = pmu
66 self.pmu.getCCObject().addSoftwareIncrementEvent(self.eventId)
73 cxx_header = 'arch/arm/pmu.hh'
H A DArmISA.py57 pmu = Param.ArmPMU(NULL, "Performance Monitoring Unit") variable in class:ArmISA
H A Dpmu.cc43 #include "arch/arm/pmu.hh"
497 assert(pmu.isa);
500 const SCR scr(pmu.isa->readMiscRegNoEffect(MISCREG_SCR));
501 const CPSR cpsr(pmu.isa->readMiscRegNoEffect(MISCREG_CPSR));
792 pmu.reg_pmovsr |= (1 << counterId);
796 if (pmu.reg_pminten & (1 << counterId)) {
797 pmu.raiseInterrupt();
H A Dpmu.hh378 * events which compose this pmu event
417 pmu(pmuReference) {}
493 PMU &pmu; member in struct:ArmISA::PMU::CounterState
H A Disa.cc42 #include "arch/arm/pmu.hh"
66 pmu(p->pmu),
76 if (!pmu)
77 pmu = &dummyDevice;
80 pmu->setISA(this);
348 (p->pmu ? 0x0000000000000100ULL : 0); // Enable PMUv3
358 (p->pmu ? 0x03000000ULL : 0); // Enable PMUv3
411 pmu->setThreadContext(tc);
583 return pmu
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H A Disa.hh80 BaseISADevice *pmu; member in class:ArmISA::ISA
/gem5/src/cpu/trace/
H A DTraceCPU.py58 def addPMU(self, pmu = None):

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