Searched refs:irq (Results 1 - 14 of 14) sorted by relevance

/gem5/src/systemc/tests/systemc/misc/sim_tests/irq/
H A Dirq.cpp22 irq.cpp --
47 sc_in<bool> irq[MAX_NUM]; local
55 irq[i]( IRQ[i] );
59 sensitive << irq[0]; local
60 sensitive << irq[1]; local
67 if (irq[i].posedge())
69 if (irq[i].negedge())
80 sc_signal<bool> irq[MAX_NUM]; local
82 proc1 P1("P1", clock, irq);
85 irq[
[all...]
/gem5/src/arch/arm/kvm/
H A Dbase_cpu.cc47 #define INTERRUPT_ID(type, vcpu, irq) ( \
50 ((irq) << KVM_ARM_IRQ_NUM_SHIFT))
H A Dgic.hh136 * @param irq Interrupt number
139 void setIntState(unsigned type, unsigned vcpu, unsigned irq, bool high);
H A Dgic.cc98 KvmKernelGicV2::setIntState(unsigned type, unsigned vcpu, unsigned irq, argument
103 assert(irq <= KVM_ARM_IRQ_NUM_MASK);
107 (irq << KVM_ARM_IRQ_NUM_SHIFT));
H A Darm_cpu.cc176 #define INTERRUPT_ID(type, vcpu, irq) ( \
179 ((irq) << KVM_ARM_IRQ_NUM_SHIFT))
/gem5/src/cpu/kvm/
H A Dvm.cc502 KvmVM::setIRQLine(uint32_t irq, bool high) argument
506 kvm_level.irq = irq;
H A Dvm.hh345 * @param irq Interrupt number
348 void setIRQLine(uint32_t irq, bool high);
H A Dx86_cpu.cc1171 kvm_int.irq = x86int->getVector();
1174 fault->name(), kvm_int.irq);
/gem5/src/arch/arm/
H A Dinterrupts.cc80 scr_routing_bit = scr.irq;
H A Dfaults.cc535 if (!scr.irq) {cpsr.i = 1;}
1439 return scr.irq;
1451 toHyp = (!scr.irq && hcr.imo && !inSecureState(tc)) ||
H A Dmiscregs_types.hh310 Bitfield<1> irq; member in namespace:ArmISA
/gem5/configs/common/
H A DFSConfig.py583 def assignISAInt(irq, apicPin):
589 source_bus_irq = irq,
598 source_bus_irq = irq,
/gem5/util/streamline/
H A Dm5stats2streamline.py452 # - irq: packed32
453 def irqCookieNameFrame(cookie, name, irq):
456 body = packed_code + packed32(cookie) + stringList(name) + packed32(irq)
/gem5/src/dev/arm/
H A Dgic_v3_cpu_interface.cc967 bool route_irq_to_el3 = scr_el3.irq;

Completed in 46 milliseconds