Searched refs:icachePort (Results 1 - 13 of 13) sorted by relevance
| /gem5/src/cpu/simple/ |
| H A D | atomic.hh | 159 AtomicCPUPort icachePort; member in class:AtomicSimpleCPU
180 Port &getInstPort() override { return icachePort; }
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| H A D | timing.hh | 256 IcachePort icachePort; member in class:TimingSimpleCPU
270 Port &getInstPort() override { return icachePort; }
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| H A D | atomic.cc | 86 icachePort(name() + ".icache_port", this),
700 icache_latency = sendPacket(icachePort, &ifetch_pkt);
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| H A D | timing.cc | 80 : BaseSimpleCPU(p), fetchTranslation(this), icachePort(this),
707 if (!icachePort.sendTimingReq(ifetch_pkt)) {
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| /gem5/src/cpu/minor/ |
| H A D | fetch1.hh | 206 IcachePort icachePort; member in class:Minor::Fetch1
395 MinorCPU::MinorCPUPort &getIcachePort() { return icachePort; }
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| H A D | fetch1.cc | 68 icachePort(name_ + ".icache_port", *this, cpu_),
335 if (icachePort.sendTimingReq(request->packet)) {
662 /* Step fetches through the icachePort queues and memory system */
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| /gem5/src/cpu/checker/ |
| H A D | cpu.cc | 69 : BaseCPU(p, true), systemPtr(NULL), icachePort(NULL), dcachePort(NULL),
124 icachePort = icache_port;
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| H A D | cpu.hh | 122 assert(icachePort); variable
123 return *icachePort;
132 MasterPort *icachePort; member in class:CheckerCPU
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| H A D | cpu_impl.hh | 287 icachePort->sendFunctional(pkt);
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| /gem5/src/cpu/o3/ |
| H A D | fetch.hh | 383 MasterPort &getInstPort() { return icachePort; }
544 IcachePort icachePort; member in class:DefaultFetch
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| H A D | fetch_impl.hh | 101 icachePort(this, _cpu),
698 if (!icachePort.sendTimingReq(data_pkt)) {
1428 if (icachePort.sendTimingReq(retryPkt)) {
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| /gem5/src/cpu/trace/ |
| H A D | trace_cpu.hh | 323 IcachePort icachePort; member in class:TraceCPU
1149 Port &getInstPort() { return icachePort; }
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| H A D | trace_cpu.cc | 51 icachePort(this),
57 icacheGen(*this, ".iside", icachePort, instMasterID, instTraceFile),
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