Searched refs:crn (Results 1 - 6 of 6) sorted by relevance
/gem5/src/arch/arm/ |
H A D | utility.hh | 273 mcrMrcIssBuild(bool isRead, uint32_t crm, IntRegIndex rt, uint32_t crn, argument 279 (crn << 10) | 286 uint32_t &crn, uint32_t &opc1, uint32_t &opc2) 291 crn = (iss >> 10) & 0xF; 308 msrMrs64IssBuild(bool isRead, uint32_t op0, uint32_t op1, uint32_t crn, argument 314 (crn << 10) | 285 mcrMrcIssExtract(uint32_t iss, bool &isRead, uint32_t &crm, IntRegIndex &rt, uint32_t &crn, uint32_t &opc1, uint32_t &opc2) argument
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H A D | utility.cc | 467 uint32_t crn; local 480 mcrMrcIssExtract(iss, isRead, crm, rt, crn, opc1, opc2); 481 trapToHype = ((uint32_t) hstr) & (1 << crn); 482 trapToHype |= hdcr.tpm && (crn == 9) && (crm >= 12); 484 ((crn == 9) && ((crm <= 2) || ((crm >= 5) && (crm <= 8)))) || 485 ((crn == 10) && ((crm <= 1) || (crm == 4) || (crm == 8))) || 486 ((crn == 11) && ((crm <= 8) || (crm == 15))) ); 608 uint32_t crn; local 614 mcrMrcIssExtract(iss, isRead, crm, rt, crn, opc1, opc2); 616 crm, crn, opc 657 uint32_t crn; local [all...] |
H A D | miscregs.hh | 986 MiscRegIndex decodeCP14Reg(unsigned crn, unsigned opc1, 989 unsigned crn, unsigned crm, 995 MiscRegIndex decodeCP15Reg(unsigned crn, unsigned opc1,
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H A D | miscregs.cc | 55 decodeCP14Reg(unsigned crn, unsigned opc1, unsigned crm, unsigned opc2) argument 57 switch(crn) { 124 warn("CP14 unimplemented crn[%d], opc1[%d], crm[%d], opc2[%d]", 125 crn, opc1, crm, opc2); 132 decodeCP15Reg(unsigned crn, unsigned opc1, unsigned crm, unsigned opc2) argument 134 switch (crn) { 1201 unsigned crn, unsigned crm, 1206 switch (crn) { 1445 switch (crn) { 1647 switch (crn) { 1200 decodeAArch64SysReg(unsigned op0, unsigned op1, unsigned crn, unsigned crm, unsigned op2) argument [all...] |
/gem5/src/arch/arm/kvm/ |
H A D | armv8_cpu.cc | 186 const uint64_t crn(EXTRACT_FIELD(reg, KVM_REG_ARM64_SYSREG_CRN)); 190 decodeAArch64SysReg(op0, op1, crn, crm, op2)); 192 inform(" %s (op0: %i, op1: %i, crn: %i, crm: %i, op2: %i): %s", 193 miscRegName[idx], op0, op1, crn, crm, op2, 376 const uint64_t crn(EXTRACT_FIELD(reg, KVM_REG_ARM64_SYSREG_CRN)); 379 const MiscRegIndex idx(decodeAArch64SysReg(op0, op1, crn, crm, op2));
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H A D | arm_cpu.cc | 105 #define REG_CP32(cpnum, crn, opc1, crm, opc2) ( \ 108 ((crn) << KVM_REG_ARM_32_CRN_SHIFT) | \ 387 const unsigned crn(REG_CRN(id)); 394 return decodeCP14Reg(crn, opc1, crm, opc2); 397 return decodeCP15Reg(crn, opc1, crm, opc2);
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