/gem5/src/arch/arm/insts/ |
H A D | sve_mem.hh | 63 IntRegIndex _base, uint64_t _imm) 65 dest(_dest), base(_base), imm(_imm), 68 baseIsSP = isSP(_base); 88 IntRegIndex _base, uint64_t _imm) 90 dest(_dest), base(_base), imm(_imm), 93 baseIsSP = isSP(_base); 113 IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, 116 dest(_dest), gp(_gp), base(_base), offset(_offset), 119 baseIsSP = isSP(_base); 139 IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, 61 SveMemVecFillSpill(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _base, uint64_t _imm) argument 86 SveMemPredFillSpill(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _base, uint64_t _imm) argument 112 SveContigMemSS(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, IntRegIndex _offset) argument 138 SveContigMemSI(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, uint64_t _imm) argument [all...] |
H A D | mem.hh | 90 IntRegIndex _base, AddrMode _mode, bool _wb) 92 base(_base), mode(_mode), wb(_wb), 175 IntRegIndex _dest, IntRegIndex _base, bool _add) 177 dest(_dest), base(_base), add(_add), uops(NULL) 213 IntRegIndex _dest, IntRegIndex _base, bool _add, int32_t _imm) 214 : Memory(mnem, _machInst, __opClass, _dest, _base, _add), imm(_imm) 233 IntRegIndex _result, IntRegIndex _dest, IntRegIndex _base, 235 : MemoryImm(mnem, _machInst, __opClass, _dest, _base, _add, _imm), 256 IntRegIndex _base, bool _add, int32_t _imm) 257 : MemoryImm(mnem, _machInst, __opClass, _dest, _base, _ad 89 RfeOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _base, AddrMode _mode, bool _wb) argument 174 Memory(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _base, bool _add) argument 212 MemoryImm(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _base, bool _add, int32_t _imm) argument 232 MemoryExImm(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _result, IntRegIndex _dest, IntRegIndex _base, bool _add, int32_t _imm) argument 254 MemoryDImm(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _dest2, IntRegIndex _base, bool _add, int32_t _imm) argument 275 MemoryExDImm(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _result, IntRegIndex _dest, IntRegIndex _dest2, IntRegIndex _base, bool _add, int32_t _imm) argument 299 MemoryReg(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _base, bool _add, int32_t _shiftAmt, ArmShiftType _shiftType, IntRegIndex _index) argument 315 MemoryDReg(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _dest2, IntRegIndex _base, bool _add, int32_t _shiftAmt, ArmShiftType _shiftType, IntRegIndex _index) argument 338 MemoryOffset(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _base, bool _add, int32_t _imm) argument 344 MemoryOffset(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _base, bool _add, int32_t _shiftAmt, ArmShiftType _shiftType, IntRegIndex _index) argument 352 MemoryOffset(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _dest2, IntRegIndex _base, bool _add, int32_t _imm) argument 358 MemoryOffset(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _result, IntRegIndex _dest, IntRegIndex _dest2, IntRegIndex _base, bool _add, int32_t _imm) argument 366 MemoryOffset(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _dest2, IntRegIndex _base, bool _add, int32_t _shiftAmt, ArmShiftType _shiftType, IntRegIndex _index) argument 388 MemoryPreIndex(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _base, bool _add, int32_t _imm) argument 394 MemoryPreIndex(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _base, bool _add, int32_t _shiftAmt, ArmShiftType _shiftType, IntRegIndex _index) argument 402 MemoryPreIndex(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _dest2, IntRegIndex _base, bool _add, int32_t _imm) argument 408 MemoryPreIndex(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _result, IntRegIndex _dest, IntRegIndex _dest2, IntRegIndex _base, bool _add, int32_t _imm) argument 416 MemoryPreIndex(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _dest2, IntRegIndex _base, bool _add, int32_t _shiftAmt, ArmShiftType _shiftType, IntRegIndex _index) argument 438 MemoryPostIndex(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _base, bool _add, int32_t _imm) argument 444 MemoryPostIndex(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _base, bool _add, int32_t _shiftAmt, ArmShiftType _shiftType, IntRegIndex _index) argument 452 MemoryPostIndex(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _dest2, IntRegIndex _base, bool _add, int32_t _imm) argument 458 MemoryPostIndex(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _result, IntRegIndex _dest, IntRegIndex _dest2, IntRegIndex _base, bool _add, int32_t _imm) argument 466 MemoryPostIndex(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _dest2, IntRegIndex _base, bool _add, int32_t _shiftAmt, ArmShiftType _shiftType, IntRegIndex _index) argument [all...] |
H A D | mem64.hh | 56 IntRegIndex _base, MiscRegIndex _dest, uint64_t _imm) 58 base(_base), dest(_dest), imm(_imm) 105 IntRegIndex _dest, IntRegIndex _base) 107 dest(_dest), base(_base), uops(NULL), memAccessFlags(0) 109 baseIsSP = isSP(_base); 138 IntRegIndex _dest, IntRegIndex _base, int64_t _imm) 139 : Memory64(mnem, _machInst, __opClass, _dest, _base), imm(_imm) 152 IntRegIndex _dest, IntRegIndex _dest2, IntRegIndex _base, 154 : MemoryImm64(mnem, _machInst, __opClass, _dest, _base, _imm), 169 IntRegIndex _base, int32_ 55 SysDC64(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _base, MiscRegIndex _dest, uint64_t _imm) argument 104 Memory64(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _base) argument 137 MemoryImm64(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _base, int64_t _imm) argument 151 MemoryDImm64(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _dest2, IntRegIndex _base, int64_t _imm) argument 167 MemoryDImmEx64(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _result, IntRegIndex _dest, IntRegIndex _dest2, IntRegIndex _base, int32_t _imm) argument 181 MemoryPreIndex64(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _base, int64_t _imm) argument 194 MemoryPostIndex64(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _base, int64_t _imm) argument 211 MemoryReg64(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _base, IntRegIndex _offset, ArmExtendType _type, uint64_t _shiftAmt) argument 226 MemoryRaw64(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _base) argument 240 MemoryEx64(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _base, IntRegIndex _result) argument [all...] |
H A D | sve_macromem.hh | 62 IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, 65 dest(_dest), gp(_gp), base(_base), offset(_offset), numregs(_numregs) 74 _gp, _base, _offset, _numregs, i); 133 IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, 136 dest(_dest), gp(_gp), base(_base), offset(_offset), numregs(_numregs) 151 _gp, _base, _offset, _numregs, i); 206 IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, 209 dest(_dest), gp(_gp), base(_base), imm(_imm), numregs(_numregs) 218 _gp, _base, _imm, _numregs, i); 278 IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, 61 SveLdStructSS(const char* mnem, ExtMachInst machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, IntRegIndex _offset, uint8_t _numregs) argument 132 SveStStructSS(const char* mnem, ExtMachInst machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, IntRegIndex _offset, uint8_t _numregs) argument 205 SveLdStructSI(const char* mnem, ExtMachInst machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, int64_t _imm, uint8_t _numregs) argument 277 SveStStructSI(const char* mnem, ExtMachInst machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, int64_t _imm, uint8_t _numregs) argument 349 SveIndexedMemVI(const char *mnem, ExtMachInst machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, uint64_t _imm, bool firstFault) argument 449 SveIndexedMemSV(const char *mnem, ExtMachInst machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, IntRegIndex _offset, bool _offsetIs32, bool _offsetIsSigned, bool _offsetIsScaled, bool firstFault) argument [all...] |
H A D | macromem.hh | 414 RegIndex _dreg1, RegIndex _dreg2, RegIndex _base, 417 dest(_dreg1), dest2(_dreg2), urb(_base), up(_up), imm(_imm), 413 MicroMemPairOp(const char *mnem, ExtMachInst machInst, OpClass __opClass, RegIndex _dreg1, RegIndex _dreg2, RegIndex _base, bool _up, uint8_t _imm) argument
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/gem5/src/arch/x86/insts/ |
H A D | microldstop.hh | 72 uint8_t _scale, InstRegIndex _index, InstRegIndex _base, 78 scale(_scale), index(_index.index()), base(_base.index()), 103 uint8_t _scale, InstRegIndex _index, InstRegIndex _base, 110 _scale, _index, _base, _disp, _segment, 136 uint8_t _scale, InstRegIndex _index, InstRegIndex _base, 143 _scale, _index, _base, _disp, _segment, 69 MemOp(ExtMachInst _machInst, const char * mnem, const char * _instMnem, uint64_t setFlags, uint8_t _scale, InstRegIndex _index, InstRegIndex _base, uint64_t _disp, InstRegIndex _segment, uint8_t _dataSize, uint8_t _addressSize, Request::FlagsType _memFlags, OpClass __opClass) argument 100 LdStOp(ExtMachInst _machInst, const char * mnem, const char * _instMnem, uint64_t setFlags, uint8_t _scale, InstRegIndex _index, InstRegIndex _base, uint64_t _disp, InstRegIndex _segment, InstRegIndex _data, uint8_t _dataSize, uint8_t _addressSize, Request::FlagsType _memFlags, OpClass __opClass) argument 133 LdStSplitOp(ExtMachInst _machInst, const char * mnem, const char * _instMnem, uint64_t setFlags, uint8_t _scale, InstRegIndex _index, InstRegIndex _base, uint64_t _disp, InstRegIndex _segment, InstRegIndex _dataLow, InstRegIndex _dataHi, uint8_t _dataSize, uint8_t _addressSize, Request::FlagsType _memFlags, OpClass __opClass) argument
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/gem5/src/dev/virtio/ |
H A D | base.hh | 483 : header{0, 0}, ring(size), _proxy(proxy), _base(0) {} 490 void setAddress(Addr addr) { _base = addr; } 494 assert(_base != 0); 495 _proxy.readBlob(_base, &header, sizeof(header)); 502 assert(_base != 0); 505 _proxy.writeBlob(_base, &out, sizeof(out)); 513 _proxy.readBlob(_base + sizeof(header), 520 assert(_base != 0); 526 _proxy.writeBlob(_base + sizeof(header), 543 Addr _base; member in class:VirtQueue::VirtRing [all...] |
/gem5/src/sim/ |
H A D | init.hh | 88 const char *_base);
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H A D | init.cc | 157 const char *_base) 158 : initFunc(init_func), registered(false), name(_name), base(_base) 155 EmbeddedPyBind(const char *_name, void (*init_func)(py::module &), const char *_base) argument
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/gem5/src/python/m5/ |
H A D | SimObject.py | 499 cls._base = base 509 cls._base = None 719 if cls._base: 720 code('py::class_<${cls}Params, ${{cls._base.type}}Params, ' \ 753 elif cls._base: 756 bases.append(cls._base.cxx_class) 779 cls, cls._base.type if cls._base else "") 899 if cls._base: 900 code('#include "params/${{cls._base [all...] |