1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * Copyright (c) 2015 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating
9 * to a hardware implementation of the functionality of the software
10 * licensed hereunder.  You may use the software subject to the license
11 * terms below provided that you ensure that this notice is replicated
12 * unmodified and in its entirety in all distributions of the software,
13 * modified or unmodified, in source code or in binary form.
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions are
17 * met: redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer;
19 * redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the distribution;
22 * neither the name of the copyright holders nor the names of its
23 * contributors may be used to endorse or promote products derived from
24 * this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
29 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
30 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
31 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
32 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 *
38 * Authors: Gabe Black
39 */
40
41#ifndef __ARCH_X86_INSTS_MICROLDSTOP_HH__
42#define __ARCH_X86_INSTS_MICROLDSTOP_HH__
43
44#include "arch/x86/insts/microop.hh"
45#include "arch/x86/ldstflags.hh"
46#include "mem/packet.hh"
47#include "mem/request.hh"
48#include "sim/faults.hh"
49
50namespace X86ISA
51{
52    /**
53     * Base class for memory ops
54     */
55    class MemOp : public X86MicroopBase
56    {
57      protected:
58        const uint8_t scale;
59        const RegIndex index;
60        const RegIndex base;
61        const uint64_t disp;
62        const uint8_t segment;
63        const uint8_t dataSize;
64        const uint8_t addressSize;
65        const Request::FlagsType memFlags;
66        RegIndex foldOBit, foldABit;
67
68        //Constructor
69        MemOp(ExtMachInst _machInst,
70                const char * mnem, const char * _instMnem,
71                uint64_t setFlags,
72                uint8_t _scale, InstRegIndex _index, InstRegIndex _base,
73                uint64_t _disp, InstRegIndex _segment,
74                uint8_t _dataSize, uint8_t _addressSize,
75                Request::FlagsType _memFlags,
76                OpClass __opClass) :
77        X86MicroopBase(_machInst, mnem, _instMnem, setFlags, __opClass),
78                scale(_scale), index(_index.index()), base(_base.index()),
79                disp(_disp), segment(_segment.index()),
80                dataSize(_dataSize), addressSize(_addressSize),
81                memFlags(_memFlags | _segment.index())
82        {
83            assert(_segment.index() < NUM_SEGMENTREGS);
84            foldOBit =
85                (dataSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0;
86            foldABit =
87                (addressSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0;
88        }
89    };
90
91    /**
92     * Base class for load and store ops using one register
93     */
94    class LdStOp : public MemOp
95    {
96      protected:
97        const RegIndex data;
98
99        //Constructor
100        LdStOp(ExtMachInst _machInst,
101                const char * mnem, const char * _instMnem,
102                uint64_t setFlags,
103                uint8_t _scale, InstRegIndex _index, InstRegIndex _base,
104                uint64_t _disp, InstRegIndex _segment,
105                InstRegIndex _data,
106                uint8_t _dataSize, uint8_t _addressSize,
107                Request::FlagsType _memFlags,
108                OpClass __opClass) :
109        MemOp(_machInst, mnem, _instMnem, setFlags,
110                _scale, _index, _base, _disp, _segment,
111                _dataSize, _addressSize, _memFlags,
112                __opClass),
113                data(_data.index())
114        {
115        }
116
117        std::string generateDisassembly(Addr pc,
118            const SymbolTable *symtab) const;
119    };
120
121    /**
122     * Base class for load and store ops using two registers, we will
123     * call them split ops for this reason. These are mainly  used to
124     * implement cmpxchg8b and cmpxchg16b.
125     */
126    class LdStSplitOp : public MemOp
127    {
128      protected:
129        const RegIndex dataLow;
130        const RegIndex dataHi;
131
132        //Constructor
133        LdStSplitOp(ExtMachInst _machInst,
134                const char * mnem, const char * _instMnem,
135                uint64_t setFlags,
136                uint8_t _scale, InstRegIndex _index, InstRegIndex _base,
137                uint64_t _disp, InstRegIndex _segment,
138                InstRegIndex _dataLow, InstRegIndex _dataHi,
139                uint8_t _dataSize, uint8_t _addressSize,
140                Request::FlagsType _memFlags,
141                OpClass __opClass) :
142        MemOp(_machInst, mnem, _instMnem, setFlags,
143                _scale, _index, _base, _disp, _segment,
144                _dataSize, _addressSize, _memFlags,
145                __opClass),
146                dataLow(_dataLow.index()),
147                dataHi(_dataHi.index())
148        {
149        }
150
151        std::string generateDisassembly(Addr pc,
152            const SymbolTable *symtab) const;
153    };
154}
155
156#endif //__ARCH_X86_INSTS_MICROLDSTOP_HH__
157