Searched refs:MISCREG_MAIR0 (Results 1 - 6 of 6) sorted by relevance

/gem5/src/arch/arm/
H A Dutility.cc573 case MISCREG_MAIR0:
685 case MISCREG_MAIR0:
H A Disa.hh607 flat_idx = flattenMiscIndex(MISCREG_MAIR0 +
H A Dmiscregs.hh307 MISCREG_MAIR0, enumerator in enum:ArmISA::MiscRegIndex
H A Disa.cc1842 case MISCREG_MAIR0:
H A Dtable_walker.cc1266 MiscRegIndex reg = attrIndx & 0x4 ? MISCREG_MAIR1 : MISCREG_MAIR0;
H A Dmiscregs.cc3537 InitReg(MISCREG_MAIR0)

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