Searched refs:MISCREG_ICC_EOIR0 (Results 1 - 3 of 3) sorted by relevance

/gem5/src/arch/arm/
H A Dmiscregs.hh825 MISCREG_ICC_EOIR0, enumerator in enum:ArmISA::MiscRegIndex
H A Dmiscregs.cc681 return MISCREG_ICC_EOIR0;
4515 .mapsTo(MISCREG_ICC_EOIR0);
4822 InitReg(MISCREG_ICC_EOIR0)
/gem5/src/dev/arm/
H A Dgic_v3_cpu_interface.cc789 case MISCREG_ICC_EOIR0:

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