Searched refs:MISCREG_ICC_CTLR_EL1_NS (Results 1 - 3 of 3) sorted by relevance

/gem5/src/dev/arm/
H A Dgic_v3_cpu_interface.cc1078 isa->readMiscRegNoEffect(MISCREG_ICC_CTLR_EL1_NS);
1247 isa->readMiscRegNoEffect(MISCREG_ICC_CTLR_EL1_NS);
1261 isa->setMiscRegNoEffect(MISCREG_ICC_CTLR_EL1_NS,
1923 isa->readMiscRegNoEffect(MISCREG_ICC_CTLR_EL1_NS);
1986 icc_ctlr_el1 = isa->readMiscRegNoEffect(MISCREG_ICC_CTLR_EL1_NS);
2556 isa->readMiscRegNoEffect(MISCREG_ICC_CTLR_EL1_NS);
/gem5/src/arch/arm/
H A Dmiscregs.hh711 MISCREG_ICC_CTLR_EL1_NS, enumerator in enum:ArmISA::MiscRegIndex
H A Dmiscregs.cc4621 InitReg(MISCREG_ICC_CTLR_EL1_NS)

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