Searched refs:EnableGrp1S (Results 1 - 4 of 4) sorted by relevance

/gem5/src/dev/arm/
H A Dgic_v3_distributor.hh150 bool EnableGrp1S; member in class:Gicv3Distributor
191 return EnableGrp1S;
H A Dgic_v3_distributor.cc73 EnableGrp1S(0),
448 // EnableGrp1S [2]
453 (EnableGrp1S << 2) |
866 * EnableGrp1S [2]
881 EnableGrp1S = data & GICD_CTLR_ENABLEGRP1S;
886 "EnableGrp1S %d EnableGrp1NS %d EnableGrp0 %d\n",
887 DS, EnableGrp1S, EnableGrp1NS, EnableGrp0);
890 EnableGrp1S = 0;
1160 SERIALIZE_SCALAR(EnableGrp1S);
1179 UNSERIALIZE_SCALAR(EnableGrp1S);
[all...]
H A Dgic_v3_cpu_interface.hh116 Bitfield<1> EnableGrp1S; member in class:Gicv3CPUInterface
H A Dgic_v3_cpu_interface.cc206 igrp_el3.EnableGrp1S = ((ICC_IGRPEN1_EL1)isa->readMiscRegNoEffect(
1375 MISCREG_ICC_IGRPEN1_EL1_S, icc_igrpen1_el3.EnableGrp1S);
2310 return icc_igrpen1_el1_s.Enable && distributor->EnableGrp1S;

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