Searched refs:EnableGrp1NS (Results 1 - 4 of 4) sorted by relevance

/gem5/src/dev/arm/
H A Dgic_v3_distributor.hh151 bool EnableGrp1NS; member in class:Gicv3Distributor
194 return EnableGrp1NS;
207 return EnableGrp1NS;
H A Dgic_v3_distributor.cc74 EnableGrp1NS(0),
449 // EnableGrp1NS [1]
452 (EnableGrp1NS << 1) |
460 // GICD_CTLR.EnableGrp1NS
462 return (1 << 4) | (EnableGrp1NS << 1);
466 (EnableGrp1NS << 1) | (EnableGrp0 << 0);
851 EnableGrp1NS = data & GICD_CTLR_ENABLEGRP1NS;
854 "EnableGrp1NS %d EnableGrp0 %d\n",
855 EnableGrp1NS, EnableGrp0);
867 * EnableGrp1NS [
[all...]
H A Dgic_v3_cpu_interface.hh117 Bitfield<0> EnableGrp1NS; member in class:Gicv3CPUInterface
H A Dgic_v3_cpu_interface.cc209 igrp_el3.EnableGrp1NS = ((ICC_IGRPEN1_EL1)isa->readMiscRegNoEffect(
1377 MISCREG_ICC_IGRPEN1_EL1_NS, icc_igrpen1_el3.EnableGrp1NS);
2316 return icc_igrpen1_el1_ns.Enable && distributor->EnableGrp1NS;

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