/gem5/ext/googletest/googletest/test/ |
H A D | gtest-typed-test_test.cc | 34 #include <set> 64 typedef std::set<int> IntSet; 320 typedef Types<std::vector<double>, std::set<char> > MyContainers;
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/gem5/src/arch/generic/ |
H A D | vec_pred_reg.hh | 101 set() { container.set(); } function in class:VecPredRegT 279 set() function in class:VecPredRegContainer
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/gem5/ext/testlib/ |
H A D | main.py | 142 The logic maintains a `set` of test suites. 145 suite, that suite will added to the set. 148 suite, that suite will removed to the set. 153 If include is the first flag, start with an empty set of suites. 154 If exclude is the first flag, start with the set of all collected suites. 157 Let's trace out the set as we go through the flags to clarify:: 159 # Say our collection of suites looks like this: set(suite_ARM64, 166 set(suite_ARM64) # Suite begins empty, but adds the ARM64 suite 168 set() # Removed all suites which have tags 170 set(suite_X8 [all...] |
/gem5/ext/pybind11/tests/ |
H A D | test_pytypes.py | 42 assert not m.set_contains(set([]), 42) 166 assert d["set"] == 1 173 types = [str, bool, int, float, tuple, list, dict, set] 185 set: [4, 4, 5, 6, 6, 6],
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H A D | test_methods_and_attributes.cpp | 80 void set(int v) { value = v; } function in struct:TestProperties 102 void set1(int v) { v1.set(v); } 103 void set2(int v) { v2.set(v); } 290 .def_property("def_property_writeonly", nullptr, &TestProperties::set) 292 .def_property("def_property", &TestProperties::get, &TestProperties::set) 316 auto static_set1 = [](py::object, int v) { TestPropRVP::sv1.set(v); }; 317 auto static_set2 = [](py::object, int v) { TestPropRVP::sv2.set(v); };
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/gem5/src/mem/ |
H A D | packet.cc | 318 flags.set(pkt->flags & RESPONDER_FLAGS); 361 set<uint8_t>((uint8_t)w, endian); 364 set<uint16_t>((uint16_t)w, endian); 367 set<uint32_t>((uint32_t)w, endian); 370 set<uint64_t>((uint64_t)w, endian);
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/gem5/ext/dsent/model/ |
H A D | ElectricalModel.cc | 368 m_input_ports_->set(name_, new PortInfo(name_, net_indices_)); 379 m_output_ports_->set(name_, new PortInfo(name_, net_indices_)); 407 m_nets_->set(indexed_name, net); 410 m_net_references_->set(name_, net_indices_); 422 m_drivers_->set(name_, driver); 445 m_driver_multipliers_->set(name_, driver_multiplier); 458 m_loads_->set(name_, load); 481 m_delays_->set(name_, delay); 777 m_event_infos_->set(name_, new EventInfo(name_, getInputs())); 786 m_event_infos_->set(name [all...] |
/gem5/ext/dsent/model/electrical/router/ |
H A D | Router.cc | 239 input_port->getGenProperties()->set("UseModelEvent", "ReadWrite"); 326 getGenProperties()->set("InputPort->NumberOutputs", number_input_port_outputs); 327 getGenProperties()->set("InputPort->NumberAddressBits", number_input_port_addr_bits); 330 getGenProperties()->set("TotalNumberVirtualChannels", total_number_vcs); 389 getGenProperties()->set("Crossbar->NumberInputs", number_crossbar_inputs); 390 getGenProperties()->set("Crossbar->NumberOutputs", number_crossbar_outputs); 402 getGenProperties()->set("Crossbar->NumberSelects", number_crossbar_selects);
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/gem5/src/arch/hsail/ |
H A D | operand.hh | 196 void set(Wavefront *w, int lane, OperandType &val); 202 SRegOperand::set(Wavefront *w, int lane, OperandType &val) function in class:SRegOperand 215 SRegOperand::set(Wavefront *w, int lane, uint64_t &val) function in class:SRegOperand 273 set(Wavefront *w, int lane, OperandType &val) function in class:DRegOperand 334 set(Wavefront *w, int lane, OperandType &val) function in class:CRegOperand 364 panic_if(w == nullptr, "WF pointer needs to be set"); 634 // bits of the offset must be set to 0 in the BRIG 778 set(Wavefront *w, int lane, OperandType val) function in class:ListOperand
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/gem5/ext/systemc/src/sysc/datatypes/fx/ |
H A D | sc_fxnum.cpp | 75 sc_fxnum_bitref::set( bool high ) function in class:sc_dt::sc_fxnum_bitref 122 sc_fxnum_fast_bitref::set( bool high ) function in class:sc_dt::sc_fxnum_fast_bitref 170 sc_fxnum_subref::set() function in class:sc_dt::sc_fxnum_subref 189 set(); 219 sc_fxnum_fast_subref::set() function in class:sc_dt::sc_fxnum_fast_subref 238 set(); 902 // set the bits
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/gem5/src/systemc/dt/fx/ |
H A D | sc_fxnum.cc | 69 void sc_fxnum_bitref::set(bool high) { m_num.set_bit(m_idx, high); } function in class:sc_dt::sc_fxnum_bitref 101 void sc_fxnum_fast_bitref::set(bool high) { m_num.set_bit(m_idx, high); } function in class:sc_dt::sc_fxnum_fast_bitref 139 sc_fxnum_subref::set() function in class:sc_dt::sc_fxnum_subref 156 set(); 186 sc_fxnum_fast_subref::set() function in class:sc_dt::sc_fxnum_fast_subref 203 set(); 824 // set the bits
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/gem5/ext/pybind11/include/pybind11/ |
H A D | stl.h | 13 #include <set> 72 if (!isinstance<pybind11::set>(src)) 74 auto s = reinterpret_borrow<pybind11::set>(src); 89 pybind11::set s; 249 template <typename Key, typename Compare, typename Alloc> struct type_caster<std::set<Key, Compare, Alloc>> 250 : set_caster<std::set<Key, Compare, Alloc>, Key> { };
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/gem5/ext/dsent/tech/ |
H A D | TechModel.cc | 76 m_available_wire_layers_ = new std::set<String>; 177 // If the widths pointer is NULL, width is set to 1 by default 278 std::set<String>::const_iterator it; 283 const std::set<String>* TechModel::getAvailableWireLayers() const
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/gem5/ext/dsent/model/electrical/ |
H A D | BroadcastHTree.cc | 117 getGenProperties()->set("WireWidth", wire_width); 118 getGenProperties()->set("WireSpacing", wire_spacing); 119 getGenProperties()->set("WireCapacitancePerLength", wire_cap_per_len); 120 getGenProperties()->set("WireResistancePerLength", wire_res_per_len);
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/gem5/src/systemc/tests/include/ |
H A D | CoreDecouplingLTInitiator.h | 146 mQuantumKeeper.set(t);
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/gem5/src/base/ |
H A D | time.cc | 63 set(secs, nsecs);
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H A D | time.hh | 54 * Internal time set function 67 Time(uint64_t sec, uint64_t nsec) { set(sec, nsec); } 90 * Use this to set time for the purposes of time measurement (use 96 * Use this to set the time to the actual current time 103 void set(time_t _sec, long _nsec) { sec(_sec); nsec(_nsec); } function in class:Time
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/gem5/src/cpu/o3/ |
H A D | mem_dep_unit.hh | 48 #include <set>
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/gem5/src/sim/ |
H A D | serialize.hh | 59 #include <set> 446 const std::set<T> ¶m) 448 typename std::set<T>::const_iterator it = param.begin(); 605 arrayParamIn(CheckpointIn &cp, const std::string &name, std::set<T> ¶m)
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H A D | serialize.cc | 100 extern std::set<std::string> version_tags; 125 std::set<std::string> cpt_tags;
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/gem5/src/mem/cache/tags/ |
H A D | base.hh | 205 * Find a block given set and way. 207 * @param set The set of the block. 211 virtual ReplaceableEntry* findBlockBySetAndWay(int set, int way) const;
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/gem5/src/mem/ruby/common/ |
H A D | NetDest.cc | 55 NetDest::setNetDest(MachineType machine, const Set& set) argument 57 // assure that there is only one set of destinations for this machine 60 m_bits[MachineType_base_level(machine)] = set; 149 panic("No smallest element of an empty set."); 166 // Returns true iff all bits are set 178 // Returns true iff no bits are set 190 // returns the logical OR of "this" set and orNetDest 202 // returns the logical AND of "this" set and andNetDest
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/gem5/ext/systemc/src/sysc/qt/md/ |
H A D | powerpc_mach_b.s | 26 .set fsize, 64 27 .set lrsave, 8
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H A D | powerpc_sys5_b.s | 26 .set fsize, 64 27 .set lrsave, 4
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/gem5/ext/systemc/src/sysc/utils/ |
H A D | sc_list.cpp | 207 sc_plist_base::set( handle_t h, void* d ) function in class:sc_core::sc_plist_base 296 sc_plist_base_iter::set( void* d ) function in class:sc_core::sc_plist_base_iter
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