1/* speed test for basic CPU operations  */
2
3
4/* Marco Bucci <marco.bucci@inwind.it> */
5
6/* This code was developed with the Code Warrior integrate ppc assembler.
7 * Macros are use to hide illegal constructs whether you are using a
8 * "normal" assembler or the "C integrated" assembler.
9 */
10
11#if 0
12
13
14	.text
15	.align 4
16
17	.globl b_call_reg
18	.globl _b_call_reg
19	.globl b_call_imm
20	.globl _b_call_imm
21	.globl b_add
22	.globl _b_add
23	.globl b_load
24	.globl _b_load
25
26.set fsize, 64
27.set lrsave, 8
28
29#else
30
31#define fsize 64
32#define lrsave 8
33
34#endif
35
36
37
38
39#if 0
40.if 0
41#endif
42asm void b_null(void)
43{
44#if 0
45.endif
46#endif
47
48#if 0
49b_null:
50#endif
51
52	blr
53
54#if 0
55.if 0
56#endif
57}
58#if 0
59.endif
60#endif
61
62
63/* actually the same as the following. How to get "b_null" address?
64 * I didnt find the right sintax or the right way.
65 * I should take the current PC, then the difference to "b_null"
66 * (making the difference beween the labels), perform the sum and go?!
67 */
68#if 0
69.if 0
70#endif
71asm void b_call_reg(long n)
72{
73#if 0
74.endif
75#endif
76
77#if 0
78b_call_reg:
79_b_call_reg:
80#endif
81
82	mflr	r0
83	stw		r31,-4(r1)
84	stw		r30,-8(r1)
85	stw		r0,lrsave(r1)
86	stwu	r1,-fsize(r1)
87	mr		r30,r3
88	li		r31,0
89
90	b		L1
91L0:
92	bl		b_null
93	bl		b_null
94	bl		b_null
95	bl		b_null
96	bl		b_null
97
98	addi       r31,r31,5
99L1:
100	cmpw       r31,r30
101	blt        L0
102
103
104	lwz        r0,lrsave+fsize(r1)
105	mtlr       r0
106	lwz        r31,-4+fsize(r1)
107	lwz        r30,-8+fsize(r1)
108	addi       r1,r1,fsize
109	blr
110
111#if 0
112.if 0
113#endif
114}
115#if 0
116.endif
117#endif
118
119
120
121
122#if 0
123.if 0
124#endif
125asm void b_call_imm(long n)
126{
127#if 0
128.endif
129#endif
130
131#if 0
132b_call_imm:
133_b_call_imm:
134#endif
135
136	mflr	r0
137	stw		r31,-4(r1)
138	stw		r30,-8(r1)
139	stw		r0,lrsave(r1)
140	stwu	r1,-fsize(r1)
141	mr		r30,r3
142	li		r31,0
143
144	b		L3
145L2:
146	bl		b_null
147	bl		b_null
148	bl		b_null
149	bl		b_null
150	bl		b_null
151
152	addi       r31,r31,5
153L3:
154	cmpw       r31,r30
155	blt        L2
156
157
158	lwz        r0,lrsave+fsize(r1)
159	mtlr       r0
160	lwz        r31,-4+fsize(r1)
161	lwz        r30,-8+fsize(r1)
162	addi       r1,r1,fsize
163	blr
164
165#if 0
166.if 0
167#endif
168}
169#if 0
170.endif
171#endif
172
173
174
175#if 0
176.if 0
177#endif
178asm void b_add(long n)
179{
180#if 0
181.endif
182#endif
183
184#if 0
185b_add:
186_b_add:
187#endif
188
189	mflr	r0
190	stw		r31,-4(r1)
191	stw		r30,-8(r1)
192	stw		r0,lrsave(r1)
193	stwu	r1,-fsize(r1)
194	mr		r30,r3
195	li		r31,0
196
197	b		L5
198L4:
199	addi	r3,r3,5
200	addi	r4,r4,5
201	addi	r5,r5,5
202	addi	r6,r6,5
203	addi	r7,r7,5
204
205	addi	r3,r3,5
206	addi	r4,r4,5
207	addi	r5,r5,5
208	addi	r6,r6,5
209	addi	r7,r7,5
210
211	addi       r31,r31,10
212L5:
213	cmpw       r31,r30
214	blt        L4
215
216
217	lwz        r0,lrsave+fsize(r1)
218	mtlr       r0
219	lwz        r31,-4+fsize(r1)
220	lwz        r30,-8+fsize(r1)
221	addi       r1,r1,fsize
222	blr
223
224#if 0
225.if 0
226#endif
227}
228#if 0
229.endif
230#endif
231
232
233
234#if 0
235.if 0
236#endif
237asm void b_load(long n)
238{
239#if 0
240.endif
241#endif
242
243#if 0
244b_load:
245_b_load:
246#endif
247
248	mflr	r0
249	stw		r31,-4(r1)
250	stw		r30,-8(r1)
251	stw		r0,lrsave(r1)
252	stwu	r1,-fsize(r1)
253	mr		r30,r3
254	li		r31,0
255
256	b		L7
257L6:
258	lwz		r3,4(r1)
259	lwz		r4,8(r1)
260	lwz		r5,12(r1)
261	lwz		r6,16(r1)
262	lwz		r7,20(r1)
263
264	lwz		r3,24(r1)
265	lwz		r4,28(r1)
266	lwz		r5,32(r1)
267	lwz		r6,36(r1)
268	lwz		r7,40(r1)
269
270
271	addi       r31,r31,10
272L7:
273	cmpw       r31,r30
274	blt        L6
275
276
277	lwz        r0,lrsave+fsize(r1)
278	mtlr       r0
279	lwz        r31,-4+fsize(r1)
280	lwz        r30,-8+fsize(r1)
281	addi       r1,r1,fsize
282	blr
283
284#if 0
285.if 0
286#endif
287}
288#if 0
289.endif
290#endif
291