Searched refs:set (Results 176 - 200 of 322) sorted by relevance

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/gem5/ext/googletest/googletest/test/
H A Dgtest_filter_unittest.py48 from sets import Set as set # For Python 2.3 compatibility
58 # processes. We set an env variable to an empty string and invoke a python
69 # We set an env variable to a non-empty string, unset it, and invoke
249 self.assertEqual(set(set_var), set(full_partition))
256 return list(set(tests_to_run) - set(PARAM_TESTS))
261 """Checks that the binary runs correct set of tests for a given filter."""
295 verifies that the right set of tests were run. The union of tests run
301 tests_to_run: A set o
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/gem5/src/dev/arm/
H A Dsmmu_v3_caches.hh149 size_t pickEntryIdxToReplace(const Set &set, AllocPolicy alloc);
193 size_t pickEntryIdxToReplace(const Set &set);
233 size_t pickEntryIdxToReplace(const Set &set);
280 size_t pickEntryIdxToReplace(const Set &set);
350 size_t pickEntryIdxToReplace(const Set &set,
/gem5/src/arch/hsail/insts/
H A Dpseudo_inst.cc464 dest.set<int>(w, lane, res);
489 dest.set<int>(w, lane, res);
514 dest.set<int>(w, lane, res);
539 dest.set<int>(w, lane, res);
650 m->latency.set(w->computeUnit->shader->ticks(64));
690 m->latency.set(w->computeUnit->shader->ticks(64));
729 m->latency.set(w->computeUnit->shader->ticks(1));
767 dest.set<int>(w, lane, mst);
786 dest.set<int>(w, lane, res);
/gem5/ext/dsent/model/
H A DModel.cc239 " -> Cannot set parameters after model is constructed!");
240 m_parameters_->set(parameter_name_, parameter_value_);
262 m_properties_->set(property_name_, property_value_);
294 m_sub_instances_->set(sub_instance_name, new SubModel(sub_instance_, num_sub_instances_));
342 m_area_map_->set(area_name, area_);
374 m_ndd_power_map_->set(ndd_power_name, ndd_power_);
406 m_event_map_->set(event_name, event_);
/gem5/util/style/
H A Dverifiers.py116 languages = set of strings identifying applicable languages
135 # If no test-specific opts were set, then set based on "-all" opts.
293 languages = set(('C', 'C++', 'swig', 'python', 'asm', 'isa', 'scons',
295 trail_only = set(('make', 'dts'))
400 languages = set(('C', 'C++'))
416 languages = set(('C', 'C++', 'swig', 'python', 'asm', 'isa', 'scons'))
430 languages = set(('C', 'C++', 'swig', 'python', 'asm', 'isa', 'scons'))
444 languages = set(('C', 'C++', 'python'))
/gem5/ext/pybind11/include/pybind11/detail/
H A Dinit.h311 remove_reference_t<Set> set; member in struct:pickle_factory
313 pickle_factory(Get get, Set set) argument
314 : get(std::forward<Get>(get)), set(std::forward<Set>(set)) { }
321 cl.def("__setstate__", [func = std::move(set)]
323 auto &func = set;
/gem5/src/sim/
H A Dcxx_manager.hh57 #include <set>
125 std::set<std::string> inVisit;
274 * If you want to set some parameters before completing instantiation,
304 /** Convenience functions for calling set... member functions on a
/gem5/src/systemc/dt/int/
H A Dsc_int_base.cc164 int high_i; // Index of high order bit in dst_p to set.
204 int high_i; // Index of high order bit in dst_p to set.
456 set(i, a.test(i));
461 set(i, sgn);
473 set(i, a.test(i));
477 set(i, 0);
490 set(i, a.get_bit(i));
494 set(i, 0);
506 set(i, sc_logic(a.get_bit(i)).to_bool());
510 set(
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H A Dsc_uint_base.cc189 int high_i; // Index of high order bit in dst_p to set.
442 set(i, a.test(i));
447 set(i, sgn);
459 set(i, a.test(i));
463 set(i, 0);
476 set(i, a.get_bit(i));
480 set(i, 0);
492 set(i, sc_logic(a.get_bit(i)).to_bool());
496 set(i, 0);
605 // low_i = first bit within dst_p to be set
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/gem5/src/cpu/o3/probe/
H A Delastic_trace.hh53 #include <set>
217 std::set<InstSeqNum> physRegDepSet;
349 * The maximum distance for a dependency and is set by a top level
/gem5/src/gpu-compute/
H A Dglobal_memory_pipeline.cc106 computeUnit->glbMemToVrfBus.set(m->time);
108 w->computeUnit->wfWait.at(m->pipeId).set(m->time);
H A Dmisc.hh60 void set(uint32_t i) function in class:WaitClass
78 // rdy() and set()
/gem5/src/mem/ruby/common/
H A DSet.hh30 // >32 set lengths, using an array of ints w/ 32 bits/int
45 // Number of bits in use in this set.
74 bits.set(index);
78 * This function should set all the bits in the current set that are
79 * already set in the parameter set
89 * This function clears bits that are =1 in the parameter set
98 * This function clears bits that are =1 in the parameter set
110 * this function sets all bits in the set
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/gem5/src/mem/slicc/ast/
H A DFuncDeclAST.py44 return set()
/gem5/ext/nomali/include/libnomali/
H A Dnomali.h122 * @param set Non-zero if raising an interrupt, zero if clearing.
125 nomali_int_t intno, int set);
/gem5/ext/systemc/src/sysc/datatypes/fx/
H A Dsc_fxnum.h102 void set( bool );
173 void set( bool );
244 bool set();
407 bool set();
1441 set( a.get() );
1452 set( a.get() );
1461 set( static_cast<bool>( a ) );
1470 set( a );
1482 set( get() && b.get() );
1493 set( ge
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/gem5/src/dev/
H A Dmc146818.hh133 /// Is the DV field in regA set to disabled?
137 Bitfield<7> set; /// stop clock updates member in class:MC146818
/gem5/src/systemc/ext/dt/fx/
H A Dsc_fxnum.hh103 void set(bool);
161 void set(bool);
219 bool set();
355 bool set();
1222 set(a.get());
1232 set(a.get());
1240 set(static_cast<bool>(a));
1248 set(a);
1258 set(get() && b.get());
1268 set(ge
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/gem5/src/cpu/testers/rubytest/
H A DCheck.cc90 flags.set(Request::PREFETCH);
102 flags.set(Request::INST_FETCH);
106 flags.set(Request::PF_EXCLUSIVE);
241 flags.set(Request::INST_FETCH);
/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64mi/
H A Daccess.S24 # after the pc is set to rs1, an access exception should be raised.
H A Dbreakpoint.S85 # Try to set up a second breakpoint.
/gem5/ext/googletest/googletest/src/
H A Dgtest-typed-test.cc69 std::set<std::string> tests;
/gem5/ext/dsent/model/electrical/
H A DMuxTreeSerializer.cc89 getGenProperties()->set("SerializationRatio", serialization_ratio);
90 getGenProperties()->set("OutputBits", output_bits);
91 getGenProperties()->set("NumberStages", number_stages);
/gem5/src/systemc/core/
H A Dsensitivity.hh33 #include <set>
148 std::set<const ::sc_core::sc_event *> events;
152 Process *p, const std::set<const ::sc_core::sc_event *> &s) :
/gem5/src/arch/x86/
H A Dtypes.hh101 //this implementation, it being set means an REX prefix was present.
298 set(Addr val) function in class:X86ISA::PCState
300 Base::set(val);
305 PCState(Addr val) { set(val); }

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