Searched refs:reset (Results 501 - 525 of 607) sorted by relevance

<<2122232425

/gem5/src/mem/
H A Ddramsim2.cc182 pendingDelete.reset(pkt);
283 pendingDelete.reset(pkt);
H A Dsimple_mem.cc187 pendingDelete.reset(pkt);
/gem5/src/python/m5/stats/
H A D__init__.py379 def reset(): function
382 # call reset stats on all SimObjects
387 # call any other registered legacy stats reset callbacks
389 stat.reset()
/gem5/ext/systemc/src/sysc/kernel/
H A Dsc_module.cpp286 // set SC_THREAD asynchronous reset sensitivity
320 sensitive.reset();
321 sensitive_pos.reset();
322 sensitive_neg.reset();
338 // set SC_THREAD synchronous reset sensitivity
H A Dsc_sensitive.cpp348 void sc_sensitive::reset() function in class:sc_core::sc_sensitive
623 void sc_sensitive_pos::reset() function in class:sc_core::sc_sensitive_pos
898 void sc_sensitive_neg::reset() function in class:sc_core::sc_sensitive_neg
936 // Andy Goodrich: Changes for reduced reset support that only includes
H A Dsc_thread_process.cpp449 // process any reset signal specification:
522 // (b) if this thread is in synchronous reset
527 "attempt to suspend a thread that has a reset signal");
532 "attempt to suspend a thread in synchronous reset");
558 // This virtual method is invoked when an reset is to be thrown. The
559 // method will cancel any dynamic waits. If the reset is asynchronous it will
582 // If this is an asynchronous reset:
784 m_timeout_event_p->reset();
803 m_timeout_event_p->reset();
827 m_timeout_event_p->reset();
[all...]
/gem5/src/dev/virtio/
H A Dfs9p.cc123 config.reset((Config *)
333 dataEvent.reset(new DiodDataEvent(*this, fd_from_diod, POLLIN));
502 dataEvent.reset(new SocketDataEvent(*this, fdSocket, POLLIN));
/gem5/src/dev/
H A Ddma_device.cc301 e.reset(new DmaDoneEvent(this, max_req_size));
437 event->reset(req_size);
505 DmaReadFifo::DmaDoneEvent::reset(size_t size) function in class:DmaReadFifo::DmaDoneEvent
/gem5/src/dev/storage/
H A Dide_disk.hh174 // Software reset
274 void reset(int id);
/gem5/src/sim/
H A Ddvfs_handler.cc166 Stats::reset();
/gem5/src/systemc/core/
H A Dprocess.hh89 void reset(bool inc_kids);
/gem5/src/systemc/tests/systemc/1666-2011-compliance/child_proc_control/
H A Dchild_proc_control.cpp88 ph.reset(SC_INCLUDE_DESCENDANTS);
/gem5/src/systemc/tests/systemc/1666-2011-compliance/odds_and_ends/
H A Dodds_and_ends.cpp98 h2.reset();
/gem5/ext/googletest/googletest/include/gtest/internal/
H A Dgtest-linked_ptr.h178 void reset(T* ptr = NULL) { function in class:testing::internal::linked_ptr
H A Dgtest-param-util.h133 impl_.reset(other.impl_->Clone());
321 value_.reset();
335 value_.reset(new T(*iterator_));
/gem5/ext/googletest/googletest/test/
H A Dgtest_stress_test.cc132 threads[i].reset(new ThreadWithParam<int>(&ManyAsserts,
/gem5/src/systemc/ext/tlm_core/2/generic_payload/
H A Dgp.hh142 void reset();
/gem5/src/cpu/o3/
H A Ddyn_inst_impl.hh109 this->_readySrcRegIdx.reset();
/gem5/ext/mcpat/
H A Dcachearray.cc83 sbt_tdp_stats.reset();
84 sbt_rtp_stats.reset();
/gem5/src/cpu/kvm/
H A Dvm.cc217 cpuid.reset((struct kvm_cpuid2 *)operator new(
249 msrs.reset((struct kvm_msr_list *)operator new(
/gem5/src/cpu/trace/
H A Dtrace_cpu.hh414 void reset();
834 void reset();
H A Dtrace_cpu.cc344 trace.reset();
1114 trace.reset();
1282 TraceCPU::ElasticDataGen::InputStream::reset() function in class:TraceCPU::ElasticDataGen::InputStream
1284 trace.reset();
1489 TraceCPU::FixedRetryGen::InputStream::reset() function in class:TraceCPU::FixedRetryGen::InputStream
1491 trace.reset();
/gem5/src/mem/ruby/slicc_interface/
H A DAbstractController.cc84 m_delayHistogram.reset();
87 m_delayVCHistogram[i]->reset();
/gem5/src/systemc/tests/systemc/examples/aes/
H A Daes.cpp1058 sc_signal<bool> reset; local
1084 reset,
1095 reset,
1107 reset = 0;
1109 reset = 1;
/gem5/src/cpu/checker/
H A Dcpu_impl.hh77 thread->decoder.reset();
121 thread->decoder.reset();
339 // reset decoder on Checker
340 thread->decoder.reset();

Completed in 61 milliseconds

<<2122232425