/gem5/src/gpu-compute/ |
H A D | wavefront.cc | 424 // Are there in pipe or outstanding global memory read requests? 435 // Is there an available VRF->Global memory read bus? 468 // Is there an available VRF->LDS read bus? 492 // Is there an available VRF->Global memory read bus? 497 // Is there an available VRF->LDS read bus? 894 read<uint32_t>(vgprIdx,lane); 903 read<uint64_t>(vgprIdx,lane); 910 uint64_t regVal = condRegState->read<uint64_t>(i, lane); 918 char val = ldsChunk->read<char>(i);
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H A D | lds_state.hh | 70 * a read operation 74 read(const uint32_t index) function in class:LdsChunk 76 fatal_if(!chunk.size(), "cannot read from an LDS chunk of size 0"); 228 // read/write/atomic op
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H A D | dispatcher.cc | 127 GpuDispatcher::read(PacketPtr pkt) function in class:GpuDispatcher 135 DPRINTF(GPUDisp, " read register %#x size=%d\n", offset, pkt->getSize());
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/gem5/src/arch/x86/ |
H A D | nativetrace.cc | 46 parent->read(this, sizeof(*this));
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/gem5/src/dev/arm/ |
H A D | generic_timer.hh | 307 Tick read(PacketPtr pkt) override;
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H A D | vgic.hh | 202 Tick read(PacketPtr pkt) override;
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H A D | pl011.cc | 67 Pl011::read(PacketPtr pkt) function in class:Pl011 73 DPRINTF(Uart, " read register %#x size=%d\n", daddr, pkt->getSize()); 75 // use a temporary data since the uart registers are read/written with 90 "after UART_DR read\n"); 147 panic("Tried to read PL011 at offset %#x that doesn't exist\n", daddr); 162 panic("Uart read size too big?\n"); 182 // use a temporary data since the uart registers are read/written with
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H A D | gpu_nomali.cc | 149 NoMaliGpu::read(PacketPtr pkt) function in class:NoMaliGpu 159 panic("Unexpected GPU register read size: %i\n", size); 161 panic("Unaligned GPU read: %i\n", size); 213 "GPU register read failed"); 240 "GPU raw register read failed");
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H A D | gic_v2.hh | 268 /** read only running priority register, 1 per cpu*/ 305 // "GICD_ITARGETSR0 to GICD_ITARGETSR7 are read-only, and each 458 /** A PIO read to the device, immediately split up into 461 Tick read(PacketPtr pkt) override; 463 /** A PIO read to the device, immediately split up into 476 /** Handle a read to the distributor portion of the GIC 486 /** Handle a read to the cpu portion of the GIC
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/gem5/src/dev/net/ |
H A D | sinic.hh | 263 Tick read(PacketPtr pkt) override;
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H A D | ns_gige.hh | 345 Tick read(PacketPtr pkt) override;
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H A D | i8254xGBe.hh | 291 /** Called by event when dma to read descriptors is completed 527 Tick read(PacketPtr pkt) override;
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/gem5/tests/testing/ |
H A D | units.py | 108 return f.read()
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/gem5/util/style/ |
H A D | repo.py | 83 return f.read()
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/gem5/src/arch/sparc/ |
H A D | utility.cc | 61 uint64_t arg = vp.read<uint64_t>(sp + 92 +
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/gem5/src/mem/ruby/system/ |
H A D | GPUCoalescer.cc | 163 RequestTable::iterator read = m_readRequestTable.begin(); local 165 for (; read != read_end; ++read) { 166 GPUCoalescerRequest* request = read->second; 260 // Check if there is any outstanding read request for the same 281 // There is an outstanding read request for the cache line 365 "Inserting read request for paddr %#x for type %d\n", 577 DPRINTF(GPUCoalescer, "read callback for address %#x\n", address); 753 // requests because these requests should always be treated as read 976 << ", read reques [all...] |
/gem5/src/dev/x86/ |
H A D | i82094aa.cc | 97 X86ISA::I82094AA::read(PacketPtr pkt) function in class:X86ISA::I82094AA 109 panic("Illegal read from I/O APIC.\n"); 140 // The IOAPICVER register is read only.
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H A D | i8042.cc | 126 X86ISA::I8042::read(PacketPtr pkt) function in class:X86ISA::I8042 197 panic("Attempted to use i8042 read controller RAM command to " 201 panic("Attempted to use i8042 read controller RAM command to "
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H A D | i8259.cc | 73 X86ISA::I8259::read(PacketPtr pkt) function in class:X86ISA::I8259
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/gem5/src/cpu/o3/ |
H A D | lsq_unit.hh | 504 /** Wire to read information from the issue stage time queue. */ 538 // Will also need how many read/write ports the Dcache has. Or keep track 574 Fault read(LSQRequest *req, int load_idx); 613 LSQUnit<Impl>::read(LSQRequest *req, int load_idx) function in class:LSQUnit
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/gem5/src/arch/arm/ |
H A D | utility.cc | 116 arg = vp.read<uint64_t>(sp + 121 arg = vp.read<uint32_t>(sp + 234 // Note: in MsrMrs instruction we read the register value before 238 warn_once("Trying to read MPIDR at EL0\n");
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/gem5/ext/googletest/googlemock/scripts/ |
H A D | gmock_doctor.py | 604 msg = sys.stdin.read().strip()
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/gem5/util/streamline/ |
H A D | m5stats2streamline.py | 141 if not config.read(config_file): 819 if not config.read(config_file): 863 # Parse and read in gem5 stats file 1158 bytes_read = open(frame_path + "/" + fn, "rb").read() 1161 bytes_read = gzip.open(frame_path + "/" + fn, "rb").read()
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/gem5/src/cpu/kvm/ |
H A D | base.cc | 725 return hwCycles.read(); 781 uint64_t baseInstrs(hwInstructions.read()); 806 const uint64_t instsExecuted(hwInstructions.read() - baseInstrs);
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/gem5/tests/test-progs/insttest/src/riscv/ |
H A D | rv64i.cpp | 301 size_t n = read(fd, in, sizeof(in)); 302 cout << "Bytes read: " << n << endl; 303 cout << "String read: " << in << endl; 307 }, "open, read, unlink");
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