/gem5/ext/pybind11/tests/ |
H A D | test_stl_binders.py | 15 v_int1 = m.VectorInt(x for x in range(5)) 53 v_int2.extend(x for x in range(5)) 122 for i in range(10): 124 for i in range(10): 175 for i in range(0, 5): 183 for i in range(0, 5): 193 for i in range(1, 6): 205 for i in range(1, 6):
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H A D | test_sequences_and_iterators.py | 26 for _ in range(3): 31 for _ in range(3): 70 for _ in range(3): # __next__ must continue to raise StopIteration 121 for _ in range(3): # __next__ must continue to raise StopIteration 152 r = range(5)
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H A D | test_buffers.py | 20 for i in range(m4.rows()): 21 for j in range(m4.cols()):
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/gem5/src/systemc/tests/systemc/misc/gnats/pr-503/ |
H A D | pr-503.cpp | 501 if((atemp.range(8,4)) >= -4) { 513 dt = (((sc_int<1>(V_reg), sc_int<1>(0)), link_ptr.range(5,0)), sc_int<8>(0)); 545 dt = (((sc_int<1>(V_reg), sc_int<1>(0)), link_ptr.range(5,0)), sc_int<8>(0)); 598 dtemp.range(13,0) = RHC_ADDR_RT; 602 sig_gen_buff_addr = dtemp.range(13,7); 604 if((sig_gen_buff_addr.range(6,5)) == -1) { // **** If BQ empty 629 timer = dtemp.range(7,0); 660 DID_reg = (dtemp.range(4,0)) | (((TM_EXC_FIR.read())[1], sc_int<4>(0))); 661 MET_reg = dtemp.range(9,5); 708 _case_1021_ = dtemp.range( [all...] |
/gem5/src/systemc/tests/systemc/misc/gnats/pr-503-neg/ |
H A D | pr-503-neg.cpp | 501 if((atemp.range(8,4)) >= -4) { 513 dt = (((sc_int<1>(V_reg), sc_int<1>(0)), link_ptr.range(5,0)), sc_int<1>(0)); 545 dt = (((sc_int<1>(V_reg), sc_int<1>(0) ), link_ptr.range(5,0)), sc_int<1>(0) ); 598 dtemp.range(13,0) = RHC_ADDR_RT; 602 sig_gen_buff_addr = dtemp.range(13,7); 604 if((sig_gen_buff_addr.range(6,5)) == -1) { // **** If BQ empty 629 timer = dtemp.range(7,0); 660 DID_reg = (dtemp.range(4,0)) | (((TM_EXC_FIR.read())[1], 0)); 661 MET_reg = dtemp.range(9,5); 708 _case_1021_ = dtemp.range( [all...] |
/gem5/src/arch/sparc/ |
H A D | pagetable.hh | 254 range.va = vaddr; 255 range.size = 8*(1<<10); 256 range.contextId = asn; 257 range.partitionId = 0; 258 range.real = false; 263 TlbRange range; member in struct:SparcISA::TlbEntry 277 range.va = new_vaddr;
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H A D | tlb.cc | 120 if (tlb[x].range.real == real && 121 tlb[x].range.partitionId == partition_id && 122 tlb[x].range.va < va + PTE.size() - 1 && 123 tlb[x].range.va + tlb[x].range.size >= va && 124 (real || tlb[x].range.contextId == context_id )) 135 lookupTable.erase(tlb[x].range); 170 lookupTable.erase(new_entry->range); 174 new_entry->range.va = va; 175 new_entry->range [all...] |
/gem5/src/base/ |
H A D | addr_range.test.cc | 103 ASSERT_TRUE(range[i].contains(addr)); 105 ASSERT_FALSE(range[(i + j) % intlvSize].contains(addr)); 115 Addr offset = range[i].getOffset(addr); 128 AddrRange range[intlvSize]; member in class:AddrRangeBase 141 range[i] = AddrRange(start, end, masks, i); 172 range[i] = AddrRange(start, end, xorBits1[0], xorBits1[1], 198 range[i] = AddrRange(start, end, masks, i);
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/gem5/configs/splash2/ |
H A D | cluster.py | 171 clusters = [ Cluster() for i in range(options.numclusters)] 172 for j in range(options.numclusters): 179 for i in range(cpusPerCluster)] 184 clusters = [ Cluster() for i in range(options.numclusters)] 185 for j in range(options.numclusters): 192 for i in range(cpusPerCluster)] 197 clusters = [ Cluster() for i in range(options.numclusters)] 198 for j in range(options.numclusters): 205 for i in range(cpusPerCluster)]
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/gem5/src/mem/ |
H A D | abstract_mem.hh | 102 * memory, with an associated address range, and also provides basic 111 // Address range of this memory 112 AddrRange range; member in class:AbstractMemory 259 * Get the address range 261 * @return a single contigous address range 270 uint64_t size() const { return range.size(); } 277 Addr start() const { return range.start(); }
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H A D | backdoor.hh | 77 // The range in the guest address space covered by this back door. 78 const AddrRange &range() const { return _range; } function in class:MemBackdoor 79 void range(const AddrRange &r) { _range = r; } function in class:MemBackdoor
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H A D | abstract_mem.cc | 60 ClockedObject(p), range(params()->range), pmemAddr(NULL), 61 backdoor(params()->range, nullptr, 86 backdoor.ptr(range.interleaved() ? nullptr : pmem_addr); 204 return range; 345 assert(pkt->getAddrRange().isSubset(range)); 347 uint8_t *hostAddr = pmemAddr + pkt->getAddr() - range.start(); 435 assert(pkt->getAddrRange().isSubset(range)); 437 uint8_t *hostAddr = pmemAddr + pkt->getAddr() - range.start();
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/gem5/util/cpt_upgraders/ |
H A D | process-fdmap-rename.py | 26 for x in range(257, 1024):
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/gem5/util/tlm/conf/ |
H A D | tlm_master.py | 57 system.physmem = SimpleMemory(range = AddrRange('512MB'))
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/gem5/src/systemc/tests/systemc/misc/user_guide/chpt10.1/ |
H A D | paramadd.cpp | 68 // sum.write( sum1.range(data_width-1,0) ); 70 tmp = sum1.range( data_width - 1, 0 );
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/gem5/src/systemc/tests/systemc/misc/user_guide/param_model/ |
H A D | param.cpp | 69 // sum.write( sum1.range(data_width-1,0) ); 71 tmp = sum1.range( data_width - 1, 0 );
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/gem5/configs/example/ |
H A D | hmctest.py | 62 range(options.num_tgen)] 67 for i in range(options.num_tgen): 72 for i in range(int(options.num_tgen/2)): 87 for i in range(options.num_links_controllers):
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H A D | memcheck.py | 122 cachespec = [random.randint(1, 3) for i in range(tree_depth)] 123 testerspec = [random.randint(1, 3) for i in range(tree_depth + 1)] 204 # and linear states access memory in the range [0 : 16 Mbyte] with 8 250 testers = [proto_tester() for i in range(ntesters)] 252 for i in range(ntesters)] 268 tree_caches = [prototypes[0]() for i in range(ncaches[0])] 269 tester_caches = [proto_l1() for i in range(ntesters)]
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H A D | apu_se.py | 229 for i in range(n_cu): 259 for j in range(options.simds_per_cu): 260 for k in range(shader.n_wf): 315 for i in range(options.num_cpus): 332 for i in range(options.num_cp): 341 for i in range(options.num_cpus): 404 for i in range(len(future_cpu_list)): 412 [(cpu_list[i], future_cpu_list[i]) for i in range(options.num_cpus)] 435 for i in range(len(host_cpu.workload)): 452 for i in range(option [all...] |
/gem5/tests/configs/ |
H A D | o3-timing-mp-ruby.py | 33 cpus = [ DerivO3CPU(cpu_id=i) for i in range(nb_cores) ]
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H A D | simple-atomic-mp-ruby.py | 33 cpus = [ AtomicSimpleCPU(cpu_id=i) for i in range(nb_cores) ]
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/gem5/configs/learning_gem5/part3/ |
H A D | ruby_test.py | 57 system.mem_ranges = [AddrRange('512MB')] # Create an address range 66 system.mem_ctrl.range = system.mem_ranges[0]
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H A D | test_caches.py | 75 [L1Cache(system, self, self) for i in range(num_testers)] + \ 83 ) for i in range(num_testers)]
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/gem5/src/systemc/tests/systemc/examples/trie/ |
H A D | trie.cpp | 101 #define BRANCH(T) T.range(31,27) 102 #define SKIP(T) T.range(26,20) 103 #define ADDR(T) T.range(19,0) 104 #define LEN(T) T.range(31,25) 105 #define NEXT_HOP(T) T.range(24,15) 106 #define NEXT_PREFIX(T) T.range(14,0)
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/gem5/src/systemc/tests/tlm/endian_conv/ |
H A D | testall.py | 96 lengths = list(range(1,33)) + list(range(1,17)) + list(range(1,9)) + list(range(1,5)) + list(range(1,3)) 108 addr_base = random.choice(list(range(0,1024,bus_width))) 109 addr_offset = random.choice(list(range(bus_width))+[0]*(bus_width/2)) 125 txn.byte_enable = "".join([random.choice(bep) for x in range(belen)]) 385 for i in range(1,len(convs)):
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