Searched refs:curTick (Results 126 - 150 of 213) sorted by relevance
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/gem5/src/mem/ruby/system/ |
H A D | GPUCoalescer.cc | 202 curTick()); 325 schedule(deadlockCheckEvent, m_deadlock_threshold + curTick()); 718 schedule(issueEvent, curTick()); 812 schedule(issueEvent, curTick()); 866 schedule(issueEvent, curTick()); 944 curTick(), m_version, "Coal", "Begin", "", "", 1252 curTick(), m_version, "Coal",
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/gem5/src/dev/net/ |
H A D | ns_gige.cc | 778 Tick when = curTick(); 840 cpuIntrPost(curTick()); 857 assert(when >= curTick()); 858 assert(intrTick >= curTick() || intrTick == 0); 866 if (intrTick < curTick()) { 867 intrTick = curTick(); 884 assert(intrTick == curTick()); 1055 if (rxKickTick > curTick()) { 1403 schedule(txEvent, curTick() + retryTime); 1481 if (txKickTick > curTick()) { [all...] |
H A D | dist_etherlink.cc | 206 parent->schedule(doneEvent, curTick() + delay);
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H A D | ethertap.cc | 201 schedule(txEvent, curTick() + retryTime); 223 schedule(txEvent, curTick() + retryTime);
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H A D | i8254xGBe.cc | 707 "EINT: postInterrupt() curTick(): %d itr: %d interval: %d\n", 708 curTick(), regs.itr.interval(), itr_interval); 711 lastInterrupt + itr_interval <= curTick()) { 775 lastInterrupt = curTick(); 813 Tick t = curTick() + SimClock::Int::ns * 256 * regs.itr.interval(); 905 igbe->schedule(wbDelayEvent, curTick() + igbe->wbDelay); 915 igbe->schedule(wbDelayEvent, curTick() + igbe->wbDelay); 986 igbe->schedule(fetchDelayEvent, curTick() + igbe->fetchDelay); 996 igbe->schedule(fetchDelayEvent, curTick() + igbe->fetchDelay); 1465 igbe->reschedule(igbe->rdtrEvent, curTick() [all...] |
/gem5/src/mem/ |
H A D | dram_ctrl.hh | 426 * curTick() to DRAMPower after sorting. 513 * or before curTick() to DRAMPower library 514 * All commands before curTick are guaranteed to be complete 606 virtual void process() { mem->lastStatsResetTick = curTick(); }; 737 : entryTime(curTick()), readyTime(curTick()), pkt(_pkt),
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H A D | xbar.cc | 101 Tick offset = clockEdge() - curTick(); 155 occupancy += until - curTick(); 158 curTick(), until);
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H A D | external_slave.cc | 145 owner.schedule(responseEvent, curTick());
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/gem5/util/tlm/src/ |
H A D | sim_control.cc | 167 std::cerr << "Exit at tick " << curTick()
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/gem5/src/sim/ |
H A D | dvfs_handler.cc | 153 Tick when = curTick() + _transLatency;
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H A D | eventq.hh | 241 whenScheduled = curTick(); 355 whenCreated = curTick();
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/gem5/src/dev/arm/ |
H A D | energy_ctrl.cc | 197 schedule(updateAckEvent, curTick() + dvfsHandler->transLatency());
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H A D | pl111.cc | 470 startTime = curTick(); 513 if ((curTick() - startTime) > maxFrameTime) { 515 " have taken %d\n", curTick() - startTime, maxFrameTime); 543 curTick() +
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/gem5/util/systemc/gem5_within_systemc/ |
H A D | sc_gem5_control.cc | 286 std::cerr << "Exit at tick " << curTick()
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/gem5/configs/example/ |
H A D | ruby_mem_test.py | 174 print('Exiting @ tick', m5.curTick(), 'because', exit_event.getCause())
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H A D | ruby_gpu_random_test.py | 189 print('Exiting @ tick', m5.curTick(), 'because', exit_event.getCause())
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H A D | hmctest.py | 110 print('Exiting @ tick %i because %s (exit code is %i)' % (m5.curTick(),
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H A D | garnet_synth_traffic.py | 156 print('Exiting @ tick', m5.curTick(), 'because', exit_event.getCause())
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/gem5/configs/example/arm/ |
H A D | starter_se.py | 231 print(event.getCause(), " @ ", m5.curTick())
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/gem5/tests/ |
H A D | run.py | 148 print('Exiting @ tick', m5.curTick(), 'because', exit_event.getCause())
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/gem5/src/cpu/testers/traffic_gen/ |
H A D | base.hh | 184 waitingResp[pkt->req] = curTick();
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/gem5/src/arch/x86/ |
H A D | interrupts.cc | 395 uint64_t val = apicTimerEvent.when() - curTick(); 572 Tick offset = curTick() % clockPeriod(); 575 curTick() + (newCount + 1) * 580 curTick() + newCount *
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/gem5/src/systemc/tlm_bridge/ |
H A D | gem5_to_tlm.cc | 360 Tick nextEventTick = curTick() + delay.value(); 437 Tick nextEventTick = curTick() + delay.value();
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/gem5/src/learning_gem5/part2/ |
H A D | simple_cache.cc | 226 missLatency.sample(curTick() - missTime); 297 missTime = curTick();
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/gem5/src/dev/storage/ |
H A D | ide_disk.cc | 354 schedule(dmaTransferEvent, curTick() + DMA_BACKOFF_PERIOD); 394 schedule(dmaReadWaitEvent, curTick() + totalDiskDelay); 450 schedule(dmaReadWaitEvent, curTick() + DMA_BACKOFF_PERIOD); 512 schedule(dmaWriteWaitEvent, curTick() + totalDiskDelay); 532 schedule(dmaWriteWaitEvent, curTick() + DMA_BACKOFF_PERIOD); 614 schedule(dmaTransferEvent, curTick() + 1);
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Completed in 55 milliseconds
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