Searched refs:SimObject (Results 301 - 325 of 357) sorted by relevance
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/gem5/tests/ |
H A D | run.py | 66 """Test if a SimObject exists in the simulator. 69 name -- Name of SimObject (string) 76 return issubclass(cls, m5.objects.SimObject) 81 """Test if a SimObject exists and abort/skip test if not. 84 name -- Name of SimObject (string) 94 msg = "Test requires the '%s' SimObject." % name
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/gem5/src/arch/riscv/ |
H A D | isa.cc | 48 ISA::ISA(Params *p) : SimObject(p)
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/gem5/src/arch/x86/bios/ |
H A D | intelmp.cc | 151 SimObject(p), tableAddr(0), specRev(p->spec_rev), 171 SimObject(p), type(_type) 187 SimObject(p), type(_type), length(_length) 250 X86ISA::IntelMP::ConfigTable::ConfigTable(Params * p) : SimObject(p),
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H A D | smbios.cc | 92 SimObject(p), type(_type), handle(0), stringFields(false) 206 SimObject(p), structures(p->structures)
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/gem5/src/cpu/pred/ |
H A D | bpred_unit.hh | 67 class BPredUnit : public SimObject
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H A D | bpred_unit.cc | 57 : SimObject(params), 75 SimObject::regStats();
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H A D | tage_base.hh | 61 class TAGEBase : public SimObject
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H A D | statistical_corrector.hh | 52 class StatisticalCorrector : public SimObject
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/gem5/src/sim/ |
H A D | process.hh | 63 class Process : public SimObject 111 // override of virtual SimObject method: register statistics
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H A D | process.cc | 88 : SimObject(params), system(params->system), 240 SimObject::regStats();
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/gem5/src/mem/ruby/structures/ |
H A D | CacheMemory.hh | 50 class CacheMemory : public SimObject
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H A D | Prefetcher.cc | 42 : SimObject(p), m_num_streams(p->num_streams), 90 SimObject::regStats();
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/gem5/src/mem/ |
H A D | comm_monitor.hh | 55 * The communication monitor is a SimObject which can monitor statistics of 65 class CommMonitor : public SimObject 68 public: // Construction & SimObject interfaces 86 public: // SimObject interfaces
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H A D | comm_monitor.cc | 52 : SimObject(params), 94 return SimObject::getPort(if_name, idx);
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/gem5/src/mem/ruby/network/ |
H A D | MessageBuffer.hh | 55 class MessageBuffer : public SimObject
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/gem5/src/dev/arm/ |
H A D | SMMUv3.py | 42 from m5.SimObject import *
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/gem5/src/dev/net/ |
H A D | ethertap.cc | 95 : SimObject(p), buflen(p->bufsz), dump(p->dump), event(NULL), 167 return SimObject::getPort(if_name, idx);
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H A D | etherswitch.cc | 46 : SimObject(p), ttl(p->time_to_live) 73 return SimObject::getPort(if_name, idx);
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/gem5/src/gpu-compute/ |
H A D | wavefront.hh | 147 class Wavefront : public SimObject
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H A D | vector_register_file.cc | 50 : SimObject(p),
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/gem5/src/mem/qos/ |
H A D | mem_ctrl.hh | 195 using SimObject::schedule;
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/gem5/src/arch/arm/ |
H A D | semihosting.hh | 69 class ArmSemihosting : public SimObject 79 public: // SimObject and related interfaces
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/gem5/src/mem/cache/prefetch/ |
H A D | base.cc | 252 BasePrefetcher::addEventProbe(SimObject *obj, const char *name)
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H A D | pif.cc | 250 PIFPrefetcher::addEventProbeRetiredInsts(SimObject *obj, const char *name)
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/gem5/src/python/m5/ |
H A D | simulate.py | 55 from . import SimObject 88 # Make sure SimObject-valued params are in the configuration
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Completed in 47 milliseconds
<<1112131415