Searched refs:SimObject (Results 301 - 325 of 357) sorted by relevance

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/gem5/tests/
H A Drun.py66 """Test if a SimObject exists in the simulator.
69 name -- Name of SimObject (string)
76 return issubclass(cls, m5.objects.SimObject)
81 """Test if a SimObject exists and abort/skip test if not.
84 name -- Name of SimObject (string)
94 msg = "Test requires the '%s' SimObject." % name
/gem5/src/arch/riscv/
H A Disa.cc48 ISA::ISA(Params *p) : SimObject(p)
/gem5/src/arch/x86/bios/
H A Dintelmp.cc151 SimObject(p), tableAddr(0), specRev(p->spec_rev),
171 SimObject(p), type(_type)
187 SimObject(p), type(_type), length(_length)
250 X86ISA::IntelMP::ConfigTable::ConfigTable(Params * p) : SimObject(p),
H A Dsmbios.cc92 SimObject(p), type(_type), handle(0), stringFields(false)
206 SimObject(p), structures(p->structures)
/gem5/src/cpu/pred/
H A Dbpred_unit.hh67 class BPredUnit : public SimObject
H A Dbpred_unit.cc57 : SimObject(params),
75 SimObject::regStats();
H A Dtage_base.hh61 class TAGEBase : public SimObject
H A Dstatistical_corrector.hh52 class StatisticalCorrector : public SimObject
/gem5/src/sim/
H A Dprocess.hh63 class Process : public SimObject
111 // override of virtual SimObject method: register statistics
H A Dprocess.cc88 : SimObject(params), system(params->system),
240 SimObject::regStats();
/gem5/src/mem/ruby/structures/
H A DCacheMemory.hh50 class CacheMemory : public SimObject
H A DPrefetcher.cc42 : SimObject(p), m_num_streams(p->num_streams),
90 SimObject::regStats();
/gem5/src/mem/
H A Dcomm_monitor.hh55 * The communication monitor is a SimObject which can monitor statistics of
65 class CommMonitor : public SimObject
68 public: // Construction & SimObject interfaces
86 public: // SimObject interfaces
H A Dcomm_monitor.cc52 : SimObject(params),
94 return SimObject::getPort(if_name, idx);
/gem5/src/mem/ruby/network/
H A DMessageBuffer.hh55 class MessageBuffer : public SimObject
/gem5/src/dev/arm/
H A DSMMUv3.py42 from m5.SimObject import *
/gem5/src/dev/net/
H A Dethertap.cc95 : SimObject(p), buflen(p->bufsz), dump(p->dump), event(NULL),
167 return SimObject::getPort(if_name, idx);
H A Detherswitch.cc46 : SimObject(p), ttl(p->time_to_live)
73 return SimObject::getPort(if_name, idx);
/gem5/src/gpu-compute/
H A Dwavefront.hh147 class Wavefront : public SimObject
H A Dvector_register_file.cc50 : SimObject(p),
/gem5/src/mem/qos/
H A Dmem_ctrl.hh195 using SimObject::schedule;
/gem5/src/arch/arm/
H A Dsemihosting.hh69 class ArmSemihosting : public SimObject
79 public: // SimObject and related interfaces
/gem5/src/mem/cache/prefetch/
H A Dbase.cc252 BasePrefetcher::addEventProbe(SimObject *obj, const char *name)
H A Dpif.cc250 PIFPrefetcher::addEventProbeRetiredInsts(SimObject *obj, const char *name)
/gem5/src/python/m5/
H A Dsimulate.py55 from . import SimObject
88 # Make sure SimObject-valued params are in the configuration

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