Searched refs:SimObject (Results 226 - 250 of 357) sorted by relevance
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/gem5/src/learning_gem5/part2/ |
H A D | simple_memobj.cc | 36 SimObject(params), 49 // This is the name from the Python SimObject declaration (SimpleMemobj.py) 58 return SimObject::getPort(if_name, idx);
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H A D | goodbye_object.cc | 37 SimObject(params), event([this]{ processEvent(); }, name() + ".event"),
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H A D | simple_memobj.hh | 44 class SimpleMemobj : public SimObject
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/gem5/src/arch/x86/bios/ |
H A D | intelmp.hh | 88 class FloatingPointer : public SimObject 117 class BaseConfigEntry : public SimObject 131 class ExtConfigEntry : public SimObject 146 class ConfigTable : public SimObject
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/gem5/src/mem/ruby/structures/ |
H A D | WireBuffer.hh | 56 class WireBuffer : public SimObject
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/gem5/src/cpu/o3/ |
H A D | fu_pool.hh | 71 class FUPool : public SimObject
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/gem5/src/base/vnc/ |
H A D | vncinput.cc | 58 : SimObject(p), keyboard(NULL), mouse(NULL),
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/gem5/src/dev/net/ |
H A D | etherdump.cc | 48 : SimObject(p), stream(simout.create(p->file, true)->stream()),
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H A D | etherbus.cc | 54 : SimObject(p), ticksPerByte(p->speed), loopback(p->loopback),
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H A D | dist_etherlink.cc | 74 : SimObject(p), linkDelay(p->delay) 116 return SimObject::getPort(if_name, idx);
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/gem5/src/dev/ps2/ |
H A D | device.cc | 52 : SimObject(p)
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/gem5/src/mem/cache/tags/indexing_policies/ |
H A D | base.cc | 59 : SimObject(p), assoc(p->assoc),
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/gem5/src/arch/arm/ |
H A D | stage2_mmu.hh | 52 class Stage2MMU : public SimObject
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/gem5/src/dev/storage/ |
H A D | simple_disk.cc | 56 : SimObject(p), system(p->system), image(p->disk)
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/gem5/src/mem/cache/prefetch/ |
H A D | pif.hh | 184 * Add a SimObject and a probe name to monitor the retired instructions 185 * @param obj The SimObject pointer to listen from 188 void addEventProbeRetiredInsts(SimObject *obj, const char *name);
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/gem5/src/dev/arm/ |
H A D | Gic.py | 41 from m5.SimObject import SimObject 75 class ArmInterruptPin(SimObject): 120 class Gicv2mFrame(SimObject):
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H A D | rv_ctrl.hh | 230 : public SimObject, RealViewCtrl::Device 234 : SimObject(p),
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/gem5/src/cpu/pred/ |
H A D | BranchPredictor.py | 30 from m5.SimObject import SimObject 34 class IndirectPredictor(SimObject): 57 class BranchPredictor(SimObject): 105 class TAGEBase(SimObject): 164 class LoopPredictor(SimObject): 325 class StatisticalCorrector(SimObject):
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/gem5/src/sim/ |
H A D | system.cc | 92 : SimObject(p), _systemPort("system_port", this), 447 SimObject::regStats(); 509 System::lookupMasterId(const SimObject* obj) const 513 // number of occurrences of the SimObject pointer 525 "Cannot lookup MasterID by SimObject pointer: " 526 "More than one master is sharing the same SimObject\n"); 552 System::getMasterId(const SimObject* master, std::string submaster) 559 System::_getMasterId(const SimObject* master, const std::string& master_name) 589 System::leafMasterName(const SimObject* master, const std::string& submaster) 595 // the root SimObject maste [all...] |
H A D | drain.cc | 76 SimObject *temp = dynamic_cast<SimObject*>(obj);
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/gem5/src/arch/alpha/ |
H A D | interrupts.hh | 49 class Interrupts : public SimObject 70 Interrupts(Params * p) : SimObject(p), cpu(NULL)
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/gem5/src/cpu/minor/ |
H A D | func_unit.cc | 80 SimObject(params), 92 SimObject(params),
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/gem5/util/systemc/gem5_within_systemc/ |
H A D | sc_gem5_control.cc | 129 SimObject *obj = manager->findObject(systemName, true); 259 SimObject *root = root_manager->findObject("root", false);
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/gem5/src/arch/sparc/ |
H A D | isa.hh | 50 class ISA : public SimObject 177 using SimObject::startup;
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/gem5/src/dev/pci/ |
H A D | PciDevice.py | 41 from m5.SimObject import SimObject
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