Searched refs:name (Results 51 - 75 of 1016) sorted by relevance

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/gem5/src/dev/
H A Dintpin.cc11 * neither the name of the copyright holders nor the names of its
39 "incompatible port %s.", name(), peer.name());
55 "incompatible port %s.", name(), peer.name());
/gem5/src/base/stats/
H A Dgroup.cc21 * neither the name of the copyright holders nor the names of its
51 Group::Group(Group *parent, const char *name) argument
52 : mergedParent(name ? nullptr : parent)
54 if (parent && name) {
55 parent->addStatGroup(name, this);
56 } else if (parent && !name) {
76 so ? so->name() : "?",
105 Group::addStatGroup(const char *name, Group *block) argument
107 assert(statGroups.find(name) == statGroups.end());
109 statGroups[name]
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/gem5/src/systemc/tests/systemc/kernel/process_control/disable_enable/test1/
H A Dtest1.cpp26 // CVS MODIFICATION LOG - modifiers, enter your name, affiliation, date and
91 const char* name = "stimulator"; local
94 time_stamp(cout) << name << ": enabling target_cthread0" << endl;
101 time_stamp(cout) << name << ": enabling target_method0" << endl;
108 time_stamp(cout) << name << ": enabling target_thread0" << endl;
115 time_stamp(cout) << name << ": terminating" << endl;
122 const char* name = "target_cthread0"; local
124 time_stamp(cout) << name << ": starting" << endl;
125 time_stamp(cout) << name << ": issuing self disable" << endl;
128 time_stamp(cout) << name << "
143 const char* name = "target_method0"; local
170 const char* name = "target_thread0"; local
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/gem5/src/base/
H A Doutput.hh25 * neither the name of the copyright holders nor the names of its
74 /** Get the file name in the output directory */
75 const std::string &name() const { return _name; } function in class:OutputStream
81 OutputStream(const std::string &name,
118 const std::string &name,
165 * Determines whether given file name corresponds to standard output
168 * @param name name of file to check
169 * @return output stream for standard output or error stream if name
172 static OutputStream *checkForStdio(const std::string &name);
279 isAbsolute(const std::string &name) argument
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H A Dtrace.hh15 * neither the name of the copyright holders nor the names of its
50 * time/name/message messages */
60 void dprintf(Tick when, const std::string &name, const char *fmt, argument
63 if (!name.empty() && ignore.match(name))
68 logMessage(when, name, line.str());
72 virtual void dump(Tick when, const std::string &name,
76 virtual void logMessage(Tick when, const std::string &name,
96 * <when>: <name>: <message-body> */
106 void logMessage(Tick when, const std::string &name,
152 const std::string &name() const { return _name; } function in class:Named
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/gem5/src/gpu-compute/
H A Dexec_stage.cc17 * 3. Neither the name of the copyright holder nor the names of its
57 _name = computeUnit->name() + ".ExecStage";
156 .name(name() + ".num_transitions_active_to_idle")
161 .name(name() + ".num_cycles_with_no_issue")
166 .name(name() + ".num_cycles_with_instr_issued")
172 .name(name()
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/gem5/src/sim/
H A Dvoltage_domain.cc21 * neither the name of the copyright holders nor the names of its
55 "voltage domain %s\n", name());
61 name());
69 "range for domain %s.\n", perf_level, name());
79 voltage(), perf_level, name());
95 "%s\n", d->name(), d->domainID(), name());
100 "level %d\n", d->name(), d->domainID(), perf);
110 "from %d to %d.\n", name(), perfLevel(), perf_max);
126 "requested perf levels from source clock domains.\n", name());
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/gem5/src/sim/power/
H A Dmathexpr_powermodel.cc21 * neither the name of the copyright holders nor the names of its
53 // Calculate the name of the object we belong to
55 tokenize(path, name(), '.', true);
68 if (i->name.find(basename) == 0) {
70 stats_map[i->name.substr(basename.size())] = i;
71 } else if (i->name.find(".") == std::string::npos) {
73 stats_map[i->name] = i;
121 MathExprPowerModel::getStatValue(const std::string &name) const
126 if (name == "temp") {
128 } else if (name
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/gem5/configs/common/
H A DCpuConfig.py20 # neither the name of the copyright holders nor the names of its
63 def _cpu_subclass_tester(name):
64 cpu_class = getattr(m5.objects, name, None)
76 def get(name):
77 """Get a CPU class from a user provided class name or alias."""
80 cpu_class = _cpu_classes[name]
83 print("%s is not a valid CPU model." % (name,))
91 for name, cls in _cpu_classes.items():
92 print("\t%s" % name)
107 # Assign the same file name t
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H A DPlatformConfig.py22 # neither the name of the copyright holders nor the names of its
75 def get(name):
76 """Get a platform class from a user provided class name."""
78 real_name = _platform_aliases.get(name, name)
83 fatal("%s is not a valid Platform model." % (name,))
90 for name, cls in _platform_classes.items():
91 print("\t%s" % name)
110 for name, cls in inspect.getmembers(m5.objects, is_platform_class):
111 _platform_classes[name]
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/gem5/src/python/m5/
H A Ddebug.py11 # neither the name of the copyright holders nor the names of its
40 for name in sorted(flags):
41 if name == 'All':
43 flag = flags[name]
46 print(" %s: %s" % (name, flag.desc()))
49 for name in sorted(flags):
50 if name == 'All':
52 flag = flags[name]
55 print(" %s: %s" % (name, flag.desc()))
56 printList([ c.name() fo
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/gem5/ext/libelf/
H A Delf_hash.c36 elf_hash(const char *name) argument
41 s = (const unsigned char *) name;
/gem5/src/systemc/ext/channel/
H A Dsc_out.hh11 * neither the name of the copyright holders nor the names of its
44 explicit sc_out(const char *name) : sc_inout<T>(name) {} argument
51 sc_out(const char *name, const sc_signal_inout_if<T> &interface) : argument
52 sc_inout<T>(name, interface)
57 sc_out(const char *name, sc_port_b<sc_signal_inout_if<T> > &parent) : argument
58 sc_inout<T>(name, parent)
61 sc_out(const char *name, sc_out<T> &parent) : sc_inout<T>(name, parent) {} argument
/gem5/src/systemc/tests/systemc/kernel/sc_module_name/test01/
H A Dtest01.cpp30 MODIFICATION LOG - modifiers, enter your name, affiliation, date and
68 cout << m1.name() << endl;
69 cout << m2.name() << endl;
/gem5/src/systemc/tests/systemc/misc/parsing/T_1_1_2_1/
H A DT_1_1_2_1.cpp30 MODIFICATION LOG - modifiers, enter your name, affiliation, date and
47 const char *name = clock1.name(); local
/gem5/src/cpu/o3/probe/
H A Dsimple_trace.hh21 * neither the name of the copyright holders nor the names of its
65 /** Returns the name of the trace. */
66 const std::string name() const { return ProbeListenerObject::name() + ".trace"; } function in class:SimpleTrace
/gem5/configs/common/cores/arm/
H A D__init__.py20 # neither the name of the copyright holders nor the names of its
45 name for _, name, ispkg in iter_modules(__path__) if not ispkg
/gem5/src/dev/arm/
H A Dsmmu_v3_cmdexec.hh21 * neither the name of the copyright holders nor the names of its
58 SMMUCommandExecProcess(const std::string &name, SMMUv3 &_smmu) : argument
59 SMMUProcess(name, _smmu),
/gem5/tests/gem5/learning_gem5/
H A Dpart1_test.py11 # neither the name of the copyright holders nor the names of its
34 name='simple_test', variable
42 name='two_level_test', variable
/gem5/ext/testlib/
H A Dfixture.py11 # neither the name of the copyright holders nor the names of its
41 fixture.name, testitem.name
68 def __init__(self, name=None, **kwargs):
69 if name is None:
70 name = self.__class__.__name__
71 self.name = name
75 raise SkipException(self.name, testitem.metadata)
/gem5/src/mem/
H A Dport.cc24 * neither the name of the copyright holders nor the names of its
57 MasterPort::MasterPort(const std::string& name, SimObject* _owner, PortID _id) argument
58 : Port(name, _id), _slavePort(NULL), owner(*_owner)
72 name(), peer.name());
86 name());
114 SlavePort::SlavePort(const std::string& name, SimObject* _owner, PortID id) argument
115 : Port(name, id), _masterPort(NULL), defaultBackdoorWarned(false),
142 warn("Port %s doesn't support requesting a back door.", name());
/gem5/ext/fputils/tests/
H A Dfp80_cvtf.c40 test_cvtf(const char *name, double fin) argument
51 test_ok(name);
54 test_fail(name);
59 test_cvtf_exp(const char *name, double x, int exp) argument
62 test_cvtf(name, val);
/gem5/util/tlm/src/
H A Dsim_control.hh17 * 3. Neither the name of the copyright holder nor the names of its
112 Gem5SimControl(sc_core::sc_module_name name,
117 void registerSlavePort(const std::string& name, SCSlavePort* port);
118 void registerMasterPort(const std::string& name, SCMasterPort* port);
119 SCSlavePort* getSlavePort(const std::string& name) override;
120 SCMasterPort* getMasterPort(const std::string& name) override;
H A Dsim_control.cc17 * 3. Neither the name of the copyright holder nor the names of its
65 Gem5SimControl::Gem5SimControl(sc_core::sc_module_name name, argument
69 : Gem5SystemC::Module(name),
135 << e.name << ": " << e.message << "\n";
148 << e.name << ": " << e.message << "\n";
181 Gem5SimControl::registerSlavePort(const std::string& name, SCSlavePort* port) argument
183 if (slavePorts.find(name) == slavePorts.end()) {
184 slavePorts[name] = port;
186 std::cerr << "Slave Port " << name << " is already registered!\n"; local
192 Gem5SimControl::registerMasterPort(const std::string& name, SCMasterPor argument
197 std::cerr << "Master Port " << name << " is already registered!\\n"; local
203 getSlavePort(const std::string& name) argument
206 std::cerr << "Slave Port " << name << " was not found!\\n"; local
214 getMasterPort(const std::string& name) argument
217 std::cerr << "Master Port " << name << " was not found!\\n"; local
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/gem5/src/systemc/tests/systemc/tracing/vcd_trace/test14/
H A Dtest14.cpp27 Mod(const sc_module_name& name) : sc_module(name), a("a") argument
36 sc_trace(sc_tf, a, a.name());
37 sc_trace(sc_tf, b, b.name());
57 sc_trace(sc_tf, clk, clk.name());

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