Searched hist:7602 (Results 1 - 4 of 4) sorted by relevance

/gem5/src/arch/arm/isa/formats/
H A Duncond.isadiff 7602:cd1930acae4e Mon Aug 23 12:18:00 EDT 2010 Gene Wu <Gene.Wu@arm.com> ARM: BX instruction can be contitional if last instruction in a IT block

Branches are allowed to be the last instuction in an IT block. Before it was
assumed that they could not. So Branches in thumb2 were Uncond.
H A Dbranch.isadiff 7602:cd1930acae4e Mon Aug 23 12:18:00 EDT 2010 Gene Wu <Gene.Wu@arm.com> ARM: BX instruction can be contitional if last instruction in a IT block

Branches are allowed to be the last instuction in an IT block. Before it was
assumed that they could not. So Branches in thumb2 were Uncond.
H A Ddata.isadiff 7602:cd1930acae4e Mon Aug 23 12:18:00 EDT 2010 Gene Wu <Gene.Wu@arm.com> ARM: BX instruction can be contitional if last instruction in a IT block

Branches are allowed to be the last instuction in an IT block. Before it was
assumed that they could not. So Branches in thumb2 were Uncond.
/gem5/src/arch/arm/isa/insts/
H A Dbranch.isadiff 7602:cd1930acae4e Mon Aug 23 12:18:00 EDT 2010 Gene Wu <Gene.Wu@arm.com> ARM: BX instruction can be contitional if last instruction in a IT block

Branches are allowed to be the last instuction in an IT block. Before it was
assumed that they could not. So Branches in thumb2 were Uncond.

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