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/gem5/configs/common/
H A DSimulation.pydiff 5869:acbe11bbfe68 Tue Feb 10 18:49:00 EST 2009 Korey Sewell <ksewell@umich.edu> Configs: Add support for the InOrder CPU model
H A DOptions.pydiff 5869:acbe11bbfe68 Tue Feb 10 18:49:00 EST 2009 Korey Sewell <ksewell@umich.edu> Configs: Add support for the InOrder CPU model
/gem5/src/mem/cache/
H A Dmshr.ccdiff 11858:5869c83bc8c7 Sun Feb 19 05:30:00 EST 2017 Andreas Hansson <andreas.hansson@arm.com> mem: Ensure deferred snoops are cache-line aligned

This patch fixes a bug where a deferred snoop ended up being to a
partial cache line, and not cache-line aligned, all due to how we copy
the packet.

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