19793Sakash.bagdia@arm.com# Copyright (c) 2012-2013 ARM Limited
29518SAndreas.Sandberg@ARM.com# All rights reserved
311320Ssteve.reinhardt@amd.com#
49518SAndreas.Sandberg@ARM.com# The license below extends only to copyright in the software and shall
59518SAndreas.Sandberg@ARM.com# not be construed as granting a license to any other intellectual
69518SAndreas.Sandberg@ARM.com# property including but not limited to intellectual property relating
79518SAndreas.Sandberg@ARM.com# to a hardware implementation of the functionality of the software
89518SAndreas.Sandberg@ARM.com# licensed hereunder.  You may use the software subject to the license
99518SAndreas.Sandberg@ARM.com# terms below provided that you ensure that this notice is replicated
109518SAndreas.Sandberg@ARM.com# unmodified and in its entirety in all distributions of the software,
119518SAndreas.Sandberg@ARM.com# modified or unmodified, in source code or in binary form.
129518SAndreas.Sandberg@ARM.com#
135347Ssaidi@eecs.umich.edu# Copyright (c) 2006-2008 The Regents of The University of Michigan
147534Ssteve.reinhardt@amd.com# Copyright (c) 2010 Advanced Micro Devices, Inc.
153395Shsul@eecs.umich.edu# All rights reserved.
163395Shsul@eecs.umich.edu#
173395Shsul@eecs.umich.edu# Redistribution and use in source and binary forms, with or without
183395Shsul@eecs.umich.edu# modification, are permitted provided that the following conditions are
193395Shsul@eecs.umich.edu# met: redistributions of source code must retain the above copyright
203395Shsul@eecs.umich.edu# notice, this list of conditions and the following disclaimer;
213395Shsul@eecs.umich.edu# redistributions in binary form must reproduce the above copyright
223395Shsul@eecs.umich.edu# notice, this list of conditions and the following disclaimer in the
233395Shsul@eecs.umich.edu# documentation and/or other materials provided with the distribution;
243395Shsul@eecs.umich.edu# neither the name of the copyright holders nor the names of its
253395Shsul@eecs.umich.edu# contributors may be used to endorse or promote products derived from
263395Shsul@eecs.umich.edu# this software without specific prior written permission.
273395Shsul@eecs.umich.edu#
283395Shsul@eecs.umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
293395Shsul@eecs.umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
303395Shsul@eecs.umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
313395Shsul@eecs.umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
323395Shsul@eecs.umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
333395Shsul@eecs.umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
343395Shsul@eecs.umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
353395Shsul@eecs.umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
363395Shsul@eecs.umich.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
373395Shsul@eecs.umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
383395Shsul@eecs.umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
393395Shsul@eecs.umich.edu#
403395Shsul@eecs.umich.edu# Authors: Lisa Hsu
413395Shsul@eecs.umich.edu
4212564Sgabeblack@google.comfrom __future__ import print_function
4313774Sandreas.sandberg@arm.comfrom __future__ import absolute_import
4412564Sgabeblack@google.com
459457Svilanova@ac.upc.eduimport sys
463395Shsul@eecs.umich.edufrom os import getcwd
473509Shsul@eecs.umich.edufrom os.path import join as joinpath
486654Snate@binkert.org
4913774Sandreas.sandberg@arm.comfrom . import CpuConfig
5013774Sandreas.sandberg@arm.comfrom . import BPConfig
5113774Sandreas.sandberg@arm.comfrom . import MemConfig
529520SAndreas.Sandberg@ARM.com
533395Shsul@eecs.umich.eduimport m5
546654Snate@binkert.orgfrom m5.defines import buildEnv
553395Shsul@eecs.umich.edufrom m5.objects import *
566654Snate@binkert.orgfrom m5.util import *
576654Snate@binkert.org
586654Snate@binkert.orgaddToPath('../common')
593395Shsul@eecs.umich.edu
609139Snilay@cs.wisc.edudef getCPUClass(cpu_type):
619520SAndreas.Sandberg@ARM.com    """Returns the required cpu class and the mode of operation."""
629520SAndreas.Sandberg@ARM.com    cls = CpuConfig.get(cpu_type)
639520SAndreas.Sandberg@ARM.com    return cls, cls.memory_mode()
649139Snilay@cs.wisc.edu
653481Shsul@eecs.umich.edudef setCPUClass(options):
669139Snilay@cs.wisc.edu    """Returns two cpu classes and the initial mode of operation.
673481Shsul@eecs.umich.edu
689139Snilay@cs.wisc.edu       Restoring from a checkpoint or fast forwarding through a benchmark
699139Snilay@cs.wisc.edu       can be done using one type of cpu, and then the actual
709139Snilay@cs.wisc.edu       simulation can be carried out using another type. This function
719139Snilay@cs.wisc.edu       returns these two types of cpus and the initial mode of operation
729139Snilay@cs.wisc.edu       depending on the options provided.
739139Snilay@cs.wisc.edu    """
749139Snilay@cs.wisc.edu
759139Snilay@cs.wisc.edu    TmpClass, test_mem_mode = getCPUClass(options.cpu_type)
763481Shsul@eecs.umich.edu    CPUClass = None
779518SAndreas.Sandberg@ARM.com    if TmpClass.require_caches() and \
789518SAndreas.Sandberg@ARM.com            not options.caches and not options.ruby:
799518SAndreas.Sandberg@ARM.com        fatal("%s must be used with caches" % options.cpu_type)
803481Shsul@eecs.umich.edu
819139Snilay@cs.wisc.edu    if options.checkpoint_restore != None:
829139Snilay@cs.wisc.edu        if options.restore_with_cpu != options.cpu_type:
833481Shsul@eecs.umich.edu            CPUClass = TmpClass
849139Snilay@cs.wisc.edu            TmpClass, test_mem_mode = getCPUClass(options.restore_with_cpu)
859139Snilay@cs.wisc.edu    elif options.fast_forward:
869139Snilay@cs.wisc.edu        CPUClass = TmpClass
879139Snilay@cs.wisc.edu        TmpClass = AtomicSimpleCPU
889139Snilay@cs.wisc.edu        test_mem_mode = 'atomic'
893481Shsul@eecs.umich.edu
9012395Sswapnilster@gmail.com    # Ruby only supports atomic accesses in noncaching mode
9112395Sswapnilster@gmail.com    if test_mem_mode == 'atomic' and options.ruby:
9212395Sswapnilster@gmail.com        warn("Memory mode will be changed to atomic_noncaching")
9312395Sswapnilster@gmail.com        test_mem_mode = 'atomic_noncaching'
9412395Sswapnilster@gmail.com
953481Shsul@eecs.umich.edu    return (TmpClass, test_mem_mode, CPUClass)
963481Shsul@eecs.umich.edu
979665Sandreas.hansson@arm.comdef setMemClass(options):
989665Sandreas.hansson@arm.com    """Returns a memory controller class."""
999665Sandreas.hansson@arm.com
1009665Sandreas.hansson@arm.com    return MemConfig.get(options.mem_type)
1019665Sandreas.hansson@arm.com
1028919Snilay@cs.wisc.edudef setWorkCountOptions(system, options):
1038919Snilay@cs.wisc.edu    if options.work_item_id != None:
1048919Snilay@cs.wisc.edu        system.work_item_id = options.work_item_id
10510159Sgedare@rtems.org    if options.num_work_ids != None:
10610159Sgedare@rtems.org        system.num_work_ids = options.num_work_ids
1078919Snilay@cs.wisc.edu    if options.work_begin_cpu_id_exit != None:
1088919Snilay@cs.wisc.edu        system.work_begin_cpu_id_exit = options.work_begin_cpu_id_exit
1098919Snilay@cs.wisc.edu    if options.work_end_exit_count != None:
1108919Snilay@cs.wisc.edu        system.work_end_exit_count = options.work_end_exit_count
1118919Snilay@cs.wisc.edu    if options.work_end_checkpoint_count != None:
1128919Snilay@cs.wisc.edu        system.work_end_ckpt_count = options.work_end_checkpoint_count
1138919Snilay@cs.wisc.edu    if options.work_begin_exit_count != None:
1148919Snilay@cs.wisc.edu        system.work_begin_exit_count = options.work_begin_exit_count
1158919Snilay@cs.wisc.edu    if options.work_begin_checkpoint_count != None:
1168919Snilay@cs.wisc.edu        system.work_begin_ckpt_count = options.work_begin_checkpoint_count
1178919Snilay@cs.wisc.edu    if options.work_cpus_checkpoint_count != None:
1188919Snilay@cs.wisc.edu        system.work_cpus_ckpt_count = options.work_cpus_checkpoint_count
1193481Shsul@eecs.umich.edu
1209816Sjthestness@gmail.comdef findCptDir(options, cptdir, testsys):
1219140Snilay@cs.wisc.edu    """Figures out the directory from which the checkpointed state is read.
1229140Snilay@cs.wisc.edu
1239140Snilay@cs.wisc.edu    There are two different ways in which the directories holding checkpoints
1249140Snilay@cs.wisc.edu    can be named --
1259140Snilay@cs.wisc.edu    1. cpt.<benchmark name>.<instruction count when the checkpoint was taken>
1269140Snilay@cs.wisc.edu    2. cpt.<some number, usually the tick value when the checkpoint was taken>
1279140Snilay@cs.wisc.edu
1289140Snilay@cs.wisc.edu    This function parses through the options to figure out which one of the
1299140Snilay@cs.wisc.edu    above should be used for selecting the checkpoint, and then figures out
1309140Snilay@cs.wisc.edu    the appropriate directory.
1319140Snilay@cs.wisc.edu    """
1329140Snilay@cs.wisc.edu
1339140Snilay@cs.wisc.edu    from os.path import isdir, exists
1349140Snilay@cs.wisc.edu    from os import listdir
1359140Snilay@cs.wisc.edu    import re
1369140Snilay@cs.wisc.edu
1379140Snilay@cs.wisc.edu    if not isdir(cptdir):
1389140Snilay@cs.wisc.edu        fatal("checkpoint dir %s does not exist!", cptdir)
1399140Snilay@cs.wisc.edu
1409867Sjthestness@gmail.com    cpt_starttick = 0
1419140Snilay@cs.wisc.edu    if options.at_instruction or options.simpoint:
1429140Snilay@cs.wisc.edu        inst = options.checkpoint_restore
1439140Snilay@cs.wisc.edu        if options.simpoint:
1449140Snilay@cs.wisc.edu            # assume workload 0 has the simpoint
1459140Snilay@cs.wisc.edu            if testsys.cpu[0].workload[0].simpoint == 0:
1469140Snilay@cs.wisc.edu                fatal('Unable to find simpoint')
1479140Snilay@cs.wisc.edu            inst += int(testsys.cpu[0].workload[0].simpoint)
1489140Snilay@cs.wisc.edu
1499140Snilay@cs.wisc.edu        checkpoint_dir = joinpath(cptdir, "cpt.%s.%s" % (options.bench, inst))
1509140Snilay@cs.wisc.edu        if not exists(checkpoint_dir):
1519140Snilay@cs.wisc.edu            fatal("Unable to find checkpoint directory %s", checkpoint_dir)
15210608Sdam.sunwoo@arm.com
15310608Sdam.sunwoo@arm.com    elif options.restore_simpoint_checkpoint:
15410608Sdam.sunwoo@arm.com        # Restore from SimPoint checkpoints
15510608Sdam.sunwoo@arm.com        # Assumes that the checkpoint dir names are formatted as follows:
15610608Sdam.sunwoo@arm.com        dirs = listdir(cptdir)
15710608Sdam.sunwoo@arm.com        expr = re.compile('cpt\.simpoint_(\d+)_inst_(\d+)' +
15810608Sdam.sunwoo@arm.com                    '_weight_([\d\.e\-]+)_interval_(\d+)_warmup_(\d+)')
15910608Sdam.sunwoo@arm.com        cpts = []
16010608Sdam.sunwoo@arm.com        for dir in dirs:
16110608Sdam.sunwoo@arm.com            match = expr.match(dir)
16210608Sdam.sunwoo@arm.com            if match:
16310608Sdam.sunwoo@arm.com                cpts.append(dir)
16410608Sdam.sunwoo@arm.com        cpts.sort()
16510608Sdam.sunwoo@arm.com
16610608Sdam.sunwoo@arm.com        cpt_num = options.checkpoint_restore
16710608Sdam.sunwoo@arm.com        if cpt_num > len(cpts):
16810608Sdam.sunwoo@arm.com            fatal('Checkpoint %d not found', cpt_num)
16910608Sdam.sunwoo@arm.com        checkpoint_dir = joinpath(cptdir, cpts[cpt_num - 1])
17010608Sdam.sunwoo@arm.com        match = expr.match(cpts[cpt_num - 1])
17110608Sdam.sunwoo@arm.com        if match:
17210608Sdam.sunwoo@arm.com            index = int(match.group(1))
17310608Sdam.sunwoo@arm.com            start_inst = int(match.group(2))
17410608Sdam.sunwoo@arm.com            weight_inst = float(match.group(3))
17510608Sdam.sunwoo@arm.com            interval_length = int(match.group(4))
17610608Sdam.sunwoo@arm.com            warmup_length = int(match.group(5))
17712564Sgabeblack@google.com        print("Resuming from", checkpoint_dir)
17810608Sdam.sunwoo@arm.com        simpoint_start_insts = []
17910608Sdam.sunwoo@arm.com        simpoint_start_insts.append(warmup_length)
18010608Sdam.sunwoo@arm.com        simpoint_start_insts.append(warmup_length + interval_length)
18110608Sdam.sunwoo@arm.com        testsys.cpu[0].simpoint_start_insts = simpoint_start_insts
18210608Sdam.sunwoo@arm.com        if testsys.switch_cpus != None:
18310608Sdam.sunwoo@arm.com            testsys.switch_cpus[0].simpoint_start_insts = simpoint_start_insts
18410608Sdam.sunwoo@arm.com
18512564Sgabeblack@google.com        print("Resuming from SimPoint", end=' ')
18612564Sgabeblack@google.com        print("#%d, start_inst:%d, weight:%f, interval:%d, warmup:%d" %
18712564Sgabeblack@google.com            (index, start_inst, weight_inst, interval_length, warmup_length))
18810608Sdam.sunwoo@arm.com
1899140Snilay@cs.wisc.edu    else:
1909140Snilay@cs.wisc.edu        dirs = listdir(cptdir)
19110608Sdam.sunwoo@arm.com        expr = re.compile('cpt\.([0-9]+)')
1929140Snilay@cs.wisc.edu        cpts = []
1939140Snilay@cs.wisc.edu        for dir in dirs:
1949140Snilay@cs.wisc.edu            match = expr.match(dir)
1959140Snilay@cs.wisc.edu            if match:
1969140Snilay@cs.wisc.edu                cpts.append(match.group(1))
1979140Snilay@cs.wisc.edu
1989140Snilay@cs.wisc.edu        cpts.sort(lambda a,b: cmp(long(a), long(b)))
1999140Snilay@cs.wisc.edu
2009140Snilay@cs.wisc.edu        cpt_num = options.checkpoint_restore
2019140Snilay@cs.wisc.edu        if cpt_num > len(cpts):
2029140Snilay@cs.wisc.edu            fatal('Checkpoint %d not found', cpt_num)
2039140Snilay@cs.wisc.edu
2049816Sjthestness@gmail.com        cpt_starttick = int(cpts[cpt_num - 1])
2059140Snilay@cs.wisc.edu        checkpoint_dir = joinpath(cptdir, "cpt.%s" % cpts[cpt_num - 1])
2069140Snilay@cs.wisc.edu
2079816Sjthestness@gmail.com    return cpt_starttick, checkpoint_dir
2089140Snilay@cs.wisc.edu
2099215Sandreas.hansson@arm.comdef scriptCheckpoints(options, maxtick, cptdir):
2109140Snilay@cs.wisc.edu    if options.at_instruction or options.simpoint:
2119140Snilay@cs.wisc.edu        checkpoint_inst = int(options.take_checkpoints)
2129140Snilay@cs.wisc.edu
2139140Snilay@cs.wisc.edu        # maintain correct offset if we restored from some instruction
2149140Snilay@cs.wisc.edu        if options.checkpoint_restore != None:
2159140Snilay@cs.wisc.edu            checkpoint_inst += options.checkpoint_restore
2169140Snilay@cs.wisc.edu
21712564Sgabeblack@google.com        print("Creating checkpoint at inst:%d" % (checkpoint_inst))
2189140Snilay@cs.wisc.edu        exit_event = m5.simulate()
2199140Snilay@cs.wisc.edu        exit_cause = exit_event.getCause()
22012564Sgabeblack@google.com        print("exit cause = %s" % exit_cause)
2219140Snilay@cs.wisc.edu
2229140Snilay@cs.wisc.edu        # skip checkpoint instructions should they exist
2239140Snilay@cs.wisc.edu        while exit_cause == "checkpoint":
2249140Snilay@cs.wisc.edu            exit_event = m5.simulate()
2259140Snilay@cs.wisc.edu            exit_cause = exit_event.getCause()
2269140Snilay@cs.wisc.edu
2279140Snilay@cs.wisc.edu        if exit_cause == "a thread reached the max instruction count":
2289140Snilay@cs.wisc.edu            m5.checkpoint(joinpath(cptdir, "cpt.%s.%d" % \
2299140Snilay@cs.wisc.edu                    (options.bench, checkpoint_inst)))
23012564Sgabeblack@google.com            print("Checkpoint written.")
2319140Snilay@cs.wisc.edu
2329140Snilay@cs.wisc.edu    else:
2339140Snilay@cs.wisc.edu        when, period = options.take_checkpoints.split(",", 1)
2349140Snilay@cs.wisc.edu        when = int(when)
2359140Snilay@cs.wisc.edu        period = int(period)
2369156Sandreas.hansson@arm.com        num_checkpoints = 0
2379140Snilay@cs.wisc.edu
2389634Sjthestness@gmail.com        exit_event = m5.simulate(when - m5.curTick())
2399140Snilay@cs.wisc.edu        exit_cause = exit_event.getCause()
2409140Snilay@cs.wisc.edu        while exit_cause == "checkpoint":
2419140Snilay@cs.wisc.edu            exit_event = m5.simulate(when - m5.curTick())
2429140Snilay@cs.wisc.edu            exit_cause = exit_event.getCause()
2439140Snilay@cs.wisc.edu
2449140Snilay@cs.wisc.edu        if exit_cause == "simulate() limit reached":
2459140Snilay@cs.wisc.edu            m5.checkpoint(joinpath(cptdir, "cpt.%d"))
2469140Snilay@cs.wisc.edu            num_checkpoints += 1
2479140Snilay@cs.wisc.edu
2489140Snilay@cs.wisc.edu        sim_ticks = when
2499140Snilay@cs.wisc.edu        max_checkpoints = options.max_checkpoints
2509140Snilay@cs.wisc.edu
2519140Snilay@cs.wisc.edu        while num_checkpoints < max_checkpoints and \
2529140Snilay@cs.wisc.edu                exit_cause == "simulate() limit reached":
2539140Snilay@cs.wisc.edu            if (sim_ticks + period) > maxtick:
2549140Snilay@cs.wisc.edu                exit_event = m5.simulate(maxtick - sim_ticks)
2559140Snilay@cs.wisc.edu                exit_cause = exit_event.getCause()
2569140Snilay@cs.wisc.edu                break
2579140Snilay@cs.wisc.edu            else:
2589140Snilay@cs.wisc.edu                exit_event = m5.simulate(period)
2599140Snilay@cs.wisc.edu                exit_cause = exit_event.getCause()
2609140Snilay@cs.wisc.edu                sim_ticks += period
2619140Snilay@cs.wisc.edu                while exit_event.getCause() == "checkpoint":
2629140Snilay@cs.wisc.edu                    exit_event = m5.simulate(sim_ticks - m5.curTick())
2639140Snilay@cs.wisc.edu                if exit_event.getCause() == "simulate() limit reached":
2649140Snilay@cs.wisc.edu                    m5.checkpoint(joinpath(cptdir, "cpt.%d"))
2659140Snilay@cs.wisc.edu                    num_checkpoints += 1
2669140Snilay@cs.wisc.edu
2679606Snilay@cs.wisc.edu    return exit_event
2689140Snilay@cs.wisc.edu
2699140Snilay@cs.wisc.edudef benchCheckpoints(options, maxtick, cptdir):
2709634Sjthestness@gmail.com    exit_event = m5.simulate(maxtick - m5.curTick())
2719140Snilay@cs.wisc.edu    exit_cause = exit_event.getCause()
2729140Snilay@cs.wisc.edu
2739140Snilay@cs.wisc.edu    num_checkpoints = 0
2749140Snilay@cs.wisc.edu    max_checkpoints = options.max_checkpoints
2759140Snilay@cs.wisc.edu
2769140Snilay@cs.wisc.edu    while exit_cause == "checkpoint":
2779140Snilay@cs.wisc.edu        m5.checkpoint(joinpath(cptdir, "cpt.%d"))
2789140Snilay@cs.wisc.edu        num_checkpoints += 1
2799140Snilay@cs.wisc.edu        if num_checkpoints == max_checkpoints:
2809140Snilay@cs.wisc.edu            exit_cause = "maximum %d checkpoints dropped" % max_checkpoints
2819140Snilay@cs.wisc.edu            break
2829140Snilay@cs.wisc.edu
2839140Snilay@cs.wisc.edu        exit_event = m5.simulate(maxtick - m5.curTick())
2849140Snilay@cs.wisc.edu        exit_cause = exit_event.getCause()
2859140Snilay@cs.wisc.edu
2869460Ssaidi@eecs.umich.edu    return exit_event
2879140Snilay@cs.wisc.edu
28810608Sdam.sunwoo@arm.com# Set up environment for taking SimPoint checkpoints
28910608Sdam.sunwoo@arm.com# Expecting SimPoint files generated by SimPoint 3.2
29010608Sdam.sunwoo@arm.comdef parseSimpointAnalysisFile(options, testsys):
29110608Sdam.sunwoo@arm.com    import re
29210608Sdam.sunwoo@arm.com
29310608Sdam.sunwoo@arm.com    simpoint_filename, weight_filename, interval_length, warmup_length = \
29410608Sdam.sunwoo@arm.com        options.take_simpoint_checkpoints.split(",", 3)
29512564Sgabeblack@google.com    print("simpoint analysis file:", simpoint_filename)
29612564Sgabeblack@google.com    print("simpoint weight file:", weight_filename)
29712564Sgabeblack@google.com    print("interval length:", interval_length)
29812564Sgabeblack@google.com    print("warmup length:", warmup_length)
29910608Sdam.sunwoo@arm.com
30010608Sdam.sunwoo@arm.com    interval_length = int(interval_length)
30110608Sdam.sunwoo@arm.com    warmup_length = int(warmup_length)
30210608Sdam.sunwoo@arm.com
30310608Sdam.sunwoo@arm.com    # Simpoint analysis output starts interval counts with 0.
30410608Sdam.sunwoo@arm.com    simpoints = []
30510608Sdam.sunwoo@arm.com    simpoint_start_insts = []
30610608Sdam.sunwoo@arm.com
30710608Sdam.sunwoo@arm.com    # Read in SimPoint analysis files
30810608Sdam.sunwoo@arm.com    simpoint_file = open(simpoint_filename)
30910608Sdam.sunwoo@arm.com    weight_file = open(weight_filename)
31010608Sdam.sunwoo@arm.com    while True:
31110608Sdam.sunwoo@arm.com        line = simpoint_file.readline()
31210608Sdam.sunwoo@arm.com        if not line:
31310608Sdam.sunwoo@arm.com            break
31410608Sdam.sunwoo@arm.com        m = re.match("(\d+)\s+(\d+)", line)
31510608Sdam.sunwoo@arm.com        if m:
31610608Sdam.sunwoo@arm.com            interval = int(m.group(1))
31710608Sdam.sunwoo@arm.com        else:
31810608Sdam.sunwoo@arm.com            fatal('unrecognized line in simpoint file!')
31910608Sdam.sunwoo@arm.com
32010608Sdam.sunwoo@arm.com        line = weight_file.readline()
32110608Sdam.sunwoo@arm.com        if not line:
32210608Sdam.sunwoo@arm.com            fatal('not enough lines in simpoint weight file!')
32310608Sdam.sunwoo@arm.com        m = re.match("([0-9\.e\-]+)\s+(\d+)", line)
32410608Sdam.sunwoo@arm.com        if m:
32510608Sdam.sunwoo@arm.com            weight = float(m.group(1))
32610608Sdam.sunwoo@arm.com        else:
32710608Sdam.sunwoo@arm.com            fatal('unrecognized line in simpoint weight file!')
32810608Sdam.sunwoo@arm.com
32910608Sdam.sunwoo@arm.com        if (interval * interval_length - warmup_length > 0):
33010608Sdam.sunwoo@arm.com            starting_inst_count = \
33110608Sdam.sunwoo@arm.com                interval * interval_length - warmup_length
33210608Sdam.sunwoo@arm.com            actual_warmup_length = warmup_length
33310608Sdam.sunwoo@arm.com        else:
33410608Sdam.sunwoo@arm.com            # Not enough room for proper warmup
33510608Sdam.sunwoo@arm.com            # Just starting from the beginning
33610608Sdam.sunwoo@arm.com            starting_inst_count = 0
33710608Sdam.sunwoo@arm.com            actual_warmup_length = interval * interval_length
33810608Sdam.sunwoo@arm.com
33910608Sdam.sunwoo@arm.com        simpoints.append((interval, weight, starting_inst_count,
34010608Sdam.sunwoo@arm.com            actual_warmup_length))
34110608Sdam.sunwoo@arm.com
34210608Sdam.sunwoo@arm.com    # Sort SimPoints by starting inst count
34310608Sdam.sunwoo@arm.com    simpoints.sort(key=lambda obj: obj[2])
34410608Sdam.sunwoo@arm.com    for s in simpoints:
34510608Sdam.sunwoo@arm.com        interval, weight, starting_inst_count, actual_warmup_length = s
34612564Sgabeblack@google.com        print(str(interval), str(weight), starting_inst_count,
34712564Sgabeblack@google.com            actual_warmup_length)
34810608Sdam.sunwoo@arm.com        simpoint_start_insts.append(starting_inst_count)
34910608Sdam.sunwoo@arm.com
35012564Sgabeblack@google.com    print("Total # of simpoints:", len(simpoints))
35110608Sdam.sunwoo@arm.com    testsys.cpu[0].simpoint_start_insts = simpoint_start_insts
35210608Sdam.sunwoo@arm.com
35310608Sdam.sunwoo@arm.com    return (simpoints, interval_length)
35410608Sdam.sunwoo@arm.com
35510608Sdam.sunwoo@arm.comdef takeSimpointCheckpoints(simpoints, interval_length, cptdir):
35610608Sdam.sunwoo@arm.com    num_checkpoints = 0
35710608Sdam.sunwoo@arm.com    index = 0
35810608Sdam.sunwoo@arm.com    last_chkpnt_inst_count = -1
35910608Sdam.sunwoo@arm.com    for simpoint in simpoints:
36010608Sdam.sunwoo@arm.com        interval, weight, starting_inst_count, actual_warmup_length = simpoint
36110608Sdam.sunwoo@arm.com        if starting_inst_count == last_chkpnt_inst_count:
36210608Sdam.sunwoo@arm.com            # checkpoint starting point same as last time
36310608Sdam.sunwoo@arm.com            # (when warmup period longer than starting point)
36410608Sdam.sunwoo@arm.com            exit_cause = "simpoint starting point found"
36510608Sdam.sunwoo@arm.com            code = 0
36610608Sdam.sunwoo@arm.com        else:
36710608Sdam.sunwoo@arm.com            exit_event = m5.simulate()
36810608Sdam.sunwoo@arm.com
36910608Sdam.sunwoo@arm.com            # skip checkpoint instructions should they exist
37010608Sdam.sunwoo@arm.com            while exit_event.getCause() == "checkpoint":
37112564Sgabeblack@google.com                print("Found 'checkpoint' exit event...ignoring...")
37210608Sdam.sunwoo@arm.com                exit_event = m5.simulate()
37310608Sdam.sunwoo@arm.com
37410608Sdam.sunwoo@arm.com            exit_cause = exit_event.getCause()
37510608Sdam.sunwoo@arm.com            code = exit_event.getCode()
37610608Sdam.sunwoo@arm.com
37710608Sdam.sunwoo@arm.com        if exit_cause == "simpoint starting point found":
37810608Sdam.sunwoo@arm.com            m5.checkpoint(joinpath(cptdir,
37910608Sdam.sunwoo@arm.com                "cpt.simpoint_%02d_inst_%d_weight_%f_interval_%d_warmup_%d"
38010608Sdam.sunwoo@arm.com                % (index, starting_inst_count, weight, interval_length,
38110608Sdam.sunwoo@arm.com                actual_warmup_length)))
38212564Sgabeblack@google.com            print("Checkpoint #%d written. start inst:%d weight:%f" %
38312564Sgabeblack@google.com                (num_checkpoints, starting_inst_count, weight))
38410608Sdam.sunwoo@arm.com            num_checkpoints += 1
38510608Sdam.sunwoo@arm.com            last_chkpnt_inst_count = starting_inst_count
38610608Sdam.sunwoo@arm.com        else:
38710608Sdam.sunwoo@arm.com            break
38810608Sdam.sunwoo@arm.com        index += 1
38910608Sdam.sunwoo@arm.com
39012564Sgabeblack@google.com    print('Exiting @ tick %i because %s' % (m5.curTick(), exit_cause))
39112564Sgabeblack@google.com    print("%d checkpoints taken" % num_checkpoints)
39210608Sdam.sunwoo@arm.com    sys.exit(code)
39310608Sdam.sunwoo@arm.com
39410608Sdam.sunwoo@arm.comdef restoreSimpointCheckpoint():
39510608Sdam.sunwoo@arm.com    exit_event = m5.simulate()
39610608Sdam.sunwoo@arm.com    exit_cause = exit_event.getCause()
39710608Sdam.sunwoo@arm.com
39810608Sdam.sunwoo@arm.com    if exit_cause == "simpoint starting point found":
39912564Sgabeblack@google.com        print("Warmed up! Dumping and resetting stats!")
40010608Sdam.sunwoo@arm.com        m5.stats.dump()
40110608Sdam.sunwoo@arm.com        m5.stats.reset()
40210608Sdam.sunwoo@arm.com
40310608Sdam.sunwoo@arm.com        exit_event = m5.simulate()
40410608Sdam.sunwoo@arm.com        exit_cause = exit_event.getCause()
40510608Sdam.sunwoo@arm.com
40610608Sdam.sunwoo@arm.com        if exit_cause == "simpoint starting point found":
40712564Sgabeblack@google.com            print("Done running SimPoint!")
40810608Sdam.sunwoo@arm.com            sys.exit(exit_event.getCode())
40910608Sdam.sunwoo@arm.com
41012564Sgabeblack@google.com    print('Exiting @ tick %i because %s' % (m5.curTick(), exit_cause))
41110608Sdam.sunwoo@arm.com    sys.exit(exit_event.getCode())
41210608Sdam.sunwoo@arm.com
4139151Satgutier@umich.edudef repeatSwitch(testsys, repeat_switch_cpu_list, maxtick, switch_freq):
41412564Sgabeblack@google.com    print("starting switch loop")
4159151Satgutier@umich.edu    while True:
4169151Satgutier@umich.edu        exit_event = m5.simulate(switch_freq)
4179151Satgutier@umich.edu        exit_cause = exit_event.getCause()
4189151Satgutier@umich.edu
4199151Satgutier@umich.edu        if exit_cause != "simulate() limit reached":
4209460Ssaidi@eecs.umich.edu            return exit_event
4219151Satgutier@umich.edu
4229521SAndreas.Sandberg@ARM.com        m5.switchCpus(testsys, repeat_switch_cpu_list)
4239151Satgutier@umich.edu
4249151Satgutier@umich.edu        tmp_cpu_list = []
4259151Satgutier@umich.edu        for old_cpu, new_cpu in repeat_switch_cpu_list:
4269151Satgutier@umich.edu            tmp_cpu_list.append((new_cpu, old_cpu))
4279151Satgutier@umich.edu        repeat_switch_cpu_list = tmp_cpu_list
4289151Satgutier@umich.edu
4299151Satgutier@umich.edu        if (maxtick - m5.curTick()) <= switch_freq:
4309151Satgutier@umich.edu            exit_event = m5.simulate(maxtick - m5.curTick())
4319460Ssaidi@eecs.umich.edu            return exit_event
4329151Satgutier@umich.edu
4333481Shsul@eecs.umich.edudef run(options, root, testsys, cpu_class):
4343395Shsul@eecs.umich.edu    if options.checkpoint_dir:
4353395Shsul@eecs.umich.edu        cptdir = options.checkpoint_dir
4365211Ssaidi@eecs.umich.edu    elif m5.options.outdir:
4375211Ssaidi@eecs.umich.edu        cptdir = m5.options.outdir
4383395Shsul@eecs.umich.edu    else:
4393395Shsul@eecs.umich.edu        cptdir = getcwd()
4403395Shsul@eecs.umich.edu
4415370Ssaidi@eecs.umich.edu    if options.fast_forward and options.checkpoint_restore != None:
4426654Snate@binkert.org        fatal("Can't specify both --fast-forward and --checkpoint-restore")
4435370Ssaidi@eecs.umich.edu
4445371Shsul@eecs.umich.edu    if options.standard_switch and not options.caches:
4456654Snate@binkert.org        fatal("Must specify --caches when using --standard-switch")
4465370Ssaidi@eecs.umich.edu
4479151Satgutier@umich.edu    if options.standard_switch and options.repeat_switch:
4489151Satgutier@umich.edu        fatal("Can't specify both --standard-switch and --repeat-switch")
4499151Satgutier@umich.edu
4509151Satgutier@umich.edu    if options.repeat_switch and options.take_checkpoints:
4519151Satgutier@umich.edu        fatal("Can't specify both --repeat-switch and --take-checkpoints")
4529151Satgutier@umich.edu
4533395Shsul@eecs.umich.edu    np = options.num_cpus
4543481Shsul@eecs.umich.edu    switch_cpus = None
4553481Shsul@eecs.umich.edu
4568318Sksewell@umich.edu    if options.prog_interval:
45713731Sandreas.sandberg@arm.com        for i in range(np):
4588311Sksewell@umich.edu            testsys.cpu[i].progress_interval = options.prog_interval
4596144Sksewell@umich.edu
4606641Sksewell@umich.edu    if options.maxinsts:
46113731Sandreas.sandberg@arm.com        for i in range(np):
4626641Sksewell@umich.edu            testsys.cpu[i].max_insts_any_thread = options.maxinsts
4636641Sksewell@umich.edu
4643481Shsul@eecs.umich.edu    if cpu_class:
4659433SAndreas.Sandberg@ARM.com        switch_cpus = [cpu_class(switched_out=True, cpu_id=(i))
46613731Sandreas.sandberg@arm.com                       for i in range(np)]
4673481Shsul@eecs.umich.edu
46813731Sandreas.sandberg@arm.com        for i in range(np):
4695361Srstrong@cs.ucsd.edu            if options.fast_forward:
4705369Ssaidi@eecs.umich.edu                testsys.cpu[i].max_insts_any_thread = int(options.fast_forward)
47111251Sradhika.jagtap@ARM.com            switch_cpus[i].system = testsys
4728803Sgblack@eecs.umich.edu            switch_cpus[i].workload = testsys.cpu[i].workload
4739793Sakash.bagdia@arm.com            switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain
47411251Sradhika.jagtap@ARM.com            switch_cpus[i].progress_interval = \
47511251Sradhika.jagtap@ARM.com                testsys.cpu[i].progress_interval
47612374Saustinharris@utexas.edu            switch_cpus[i].isa = testsys.cpu[i].isa
4775369Ssaidi@eecs.umich.edu            # simulation period
4788311Sksewell@umich.edu            if options.maxinsts:
4798311Sksewell@umich.edu                switch_cpus[i].max_insts_any_thread = options.maxinsts
4808887Sgeoffrey.blake@arm.com            # Add checker cpu if selected
4818887Sgeoffrey.blake@arm.com            if options.checker:
4828887Sgeoffrey.blake@arm.com                switch_cpus[i].addCheckerCpu()
48313432Spau.cabre@metempsy.com            if options.bp_type:
48413432Spau.cabre@metempsy.com                bpClass = BPConfig.get(options.bp_type)
48513432Spau.cabre@metempsy.com                switch_cpus[i].branchPred = bpClass()
48613958Sjairo.balart@metempsy.com            if options.indirect_bp_type:
48713958Sjairo.balart@metempsy.com                IndirectBPClass = \
48813958Sjairo.balart@metempsy.com                    BPConfig.get_indirect(options.indirect_bp_type)
48913967Sjavier.bueno@metempsy.com                switch_cpus[i].branchPred.indirectBranchPred = \
49013958Sjairo.balart@metempsy.com                    IndirectBPClass()
4913481Shsul@eecs.umich.edu
49211251Sradhika.jagtap@ARM.com        # If elastic tracing is enabled attach the elastic trace probe
49311251Sradhika.jagtap@ARM.com        # to the switch CPUs
49411251Sradhika.jagtap@ARM.com        if options.elastic_trace_en:
49511251Sradhika.jagtap@ARM.com            CpuConfig.config_etrace(cpu_class, switch_cpus, options)
49611251Sradhika.jagtap@ARM.com
4975311Ssaidi@eecs.umich.edu        testsys.switch_cpus = switch_cpus
49813731Sandreas.sandberg@arm.com        switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in range(np)]
4993395Shsul@eecs.umich.edu
5009151Satgutier@umich.edu    if options.repeat_switch:
5019518SAndreas.Sandberg@ARM.com        switch_class = getCPUClass(options.cpu_type)[0]
5029518SAndreas.Sandberg@ARM.com        if switch_class.require_caches() and \
5039518SAndreas.Sandberg@ARM.com                not options.caches:
50412564Sgabeblack@google.com            print("%s: Must be used with caches" % str(switch_class))
5059518SAndreas.Sandberg@ARM.com            sys.exit(1)
5069518SAndreas.Sandberg@ARM.com        if not switch_class.support_take_over():
50712564Sgabeblack@google.com            print("%s: CPU switching not supported" % str(switch_class))
5089518SAndreas.Sandberg@ARM.com            sys.exit(1)
5099151Satgutier@umich.edu
5109518SAndreas.Sandberg@ARM.com        repeat_switch_cpus = [switch_class(switched_out=True, \
51113731Sandreas.sandberg@arm.com                                               cpu_id=(i)) for i in range(np)]
5129151Satgutier@umich.edu
51313731Sandreas.sandberg@arm.com        for i in range(np):
5149151Satgutier@umich.edu            repeat_switch_cpus[i].system = testsys
5159151Satgutier@umich.edu            repeat_switch_cpus[i].workload = testsys.cpu[i].workload
5169793Sakash.bagdia@arm.com            repeat_switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain
51712374Saustinharris@utexas.edu            repeat_switch_cpus[i].isa = testsys.cpu[i].isa
5189151Satgutier@umich.edu
5199151Satgutier@umich.edu            if options.maxinsts:
5209151Satgutier@umich.edu                repeat_switch_cpus[i].max_insts_any_thread = options.maxinsts
5219151Satgutier@umich.edu
5229151Satgutier@umich.edu            if options.checker:
5239151Satgutier@umich.edu                repeat_switch_cpus[i].addCheckerCpu()
5249151Satgutier@umich.edu
5259151Satgutier@umich.edu        testsys.repeat_switch_cpus = repeat_switch_cpus
5269151Satgutier@umich.edu
5279151Satgutier@umich.edu        if cpu_class:
5289151Satgutier@umich.edu            repeat_switch_cpu_list = [(switch_cpus[i], repeat_switch_cpus[i])
52913731Sandreas.sandberg@arm.com                                      for i in range(np)]
5309151Satgutier@umich.edu        else:
5319151Satgutier@umich.edu            repeat_switch_cpu_list = [(testsys.cpu[i], repeat_switch_cpus[i])
53213731Sandreas.sandberg@arm.com                                      for i in range(np)]
5339151Satgutier@umich.edu
5343395Shsul@eecs.umich.edu    if options.standard_switch:
5359433SAndreas.Sandberg@ARM.com        switch_cpus = [TimingSimpleCPU(switched_out=True, cpu_id=(i))
53613731Sandreas.sandberg@arm.com                       for i in range(np)]
5379433SAndreas.Sandberg@ARM.com        switch_cpus_1 = [DerivO3CPU(switched_out=True, cpu_id=(i))
53813731Sandreas.sandberg@arm.com                        for i in range(np)]
5393478Shsul@eecs.umich.edu
54013731Sandreas.sandberg@arm.com        for i in range(np):
5413395Shsul@eecs.umich.edu            switch_cpus[i].system =  testsys
5423478Shsul@eecs.umich.edu            switch_cpus_1[i].system =  testsys
5438803Sgblack@eecs.umich.edu            switch_cpus[i].workload = testsys.cpu[i].workload
5448803Sgblack@eecs.umich.edu            switch_cpus_1[i].workload = testsys.cpu[i].workload
5459793Sakash.bagdia@arm.com            switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain
5469793Sakash.bagdia@arm.com            switch_cpus_1[i].clk_domain = testsys.cpu[i].clk_domain
54712374Saustinharris@utexas.edu            switch_cpus[i].isa = testsys.cpu[i].isa
54812374Saustinharris@utexas.edu            switch_cpus_1[i].isa = testsys.cpu[i].isa
5493480Shsul@eecs.umich.edu
5505361Srstrong@cs.ucsd.edu            # if restoring, make atomic cpu simulate only a few instructions
5515369Ssaidi@eecs.umich.edu            if options.checkpoint_restore != None:
5525361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = 1
5535361Srstrong@cs.ucsd.edu            # Fast forward to specified location if we are not restoring
5545361Srstrong@cs.ucsd.edu            elif options.fast_forward:
5555369Ssaidi@eecs.umich.edu                testsys.cpu[i].max_insts_any_thread = int(options.fast_forward)
5565361Srstrong@cs.ucsd.edu            # Fast forward to a simpoint (warning: time consuming)
5575361Srstrong@cs.ucsd.edu            elif options.simpoint:
5585378Ssaidi@eecs.umich.edu                if testsys.cpu[i].workload[0].simpoint == 0:
5596654Snate@binkert.org                    fatal('simpoint not found')
5605361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = \
5615361Srstrong@cs.ucsd.edu                    testsys.cpu[i].workload[0].simpoint
5625361Srstrong@cs.ucsd.edu            # No distance specified, just switch
5635361Srstrong@cs.ucsd.edu            else:
5645361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = 1
5655361Srstrong@cs.ucsd.edu
5665361Srstrong@cs.ucsd.edu            # warmup period
5675361Srstrong@cs.ucsd.edu            if options.warmup_insts:
5685361Srstrong@cs.ucsd.edu                switch_cpus[i].max_insts_any_thread =  options.warmup_insts
5695361Srstrong@cs.ucsd.edu
5705361Srstrong@cs.ucsd.edu            # simulation period
5718311Sksewell@umich.edu            if options.maxinsts:
5728311Sksewell@umich.edu                switch_cpus_1[i].max_insts_any_thread = options.maxinsts
5735353Svilas.sridharan@gmail.com
5748887Sgeoffrey.blake@arm.com            # attach the checker cpu if selected
5758887Sgeoffrey.blake@arm.com            if options.checker:
5768887Sgeoffrey.blake@arm.com                switch_cpus[i].addCheckerCpu()
5778887Sgeoffrey.blake@arm.com                switch_cpus_1[i].addCheckerCpu()
5788887Sgeoffrey.blake@arm.com
5798211Satgutier@umich.edu        testsys.switch_cpus = switch_cpus
5808211Satgutier@umich.edu        testsys.switch_cpus_1 = switch_cpus_1
58113731Sandreas.sandberg@arm.com        switch_cpu_list = [
58213731Sandreas.sandberg@arm.com            (testsys.cpu[i], switch_cpus[i]) for i in range(np)
58313731Sandreas.sandberg@arm.com        ]
58413731Sandreas.sandberg@arm.com        switch_cpu_list1 = [
58513731Sandreas.sandberg@arm.com            (switch_cpus[i], switch_cpus_1[i]) for i in range(np)
58613731Sandreas.sandberg@arm.com        ]
5873395Shsul@eecs.umich.edu
5885361Srstrong@cs.ucsd.edu    # set the checkpoint in the cpu before m5.instantiate is called
5895369Ssaidi@eecs.umich.edu    if options.take_checkpoints != None and \
5905361Srstrong@cs.ucsd.edu           (options.simpoint or options.at_instruction):
5915361Srstrong@cs.ucsd.edu        offset = int(options.take_checkpoints)
5925361Srstrong@cs.ucsd.edu        # Set an instruction break point
5935361Srstrong@cs.ucsd.edu        if options.simpoint:
59413731Sandreas.sandberg@arm.com            for i in range(np):
5955378Ssaidi@eecs.umich.edu                if testsys.cpu[i].workload[0].simpoint == 0:
5966654Snate@binkert.org                    fatal('no simpoint for testsys.cpu[%d].workload[0]', i)
5975369Ssaidi@eecs.umich.edu                checkpoint_inst = int(testsys.cpu[i].workload[0].simpoint) + offset
5985361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = checkpoint_inst
5995361Srstrong@cs.ucsd.edu                # used for output below
6005361Srstrong@cs.ucsd.edu                options.take_checkpoints = checkpoint_inst
6015361Srstrong@cs.ucsd.edu        else:
6025361Srstrong@cs.ucsd.edu            options.take_checkpoints = offset
6035361Srstrong@cs.ucsd.edu            # Set all test cpus with the right number of instructions
6045361Srstrong@cs.ucsd.edu            # for the upcoming simulation
60513731Sandreas.sandberg@arm.com            for i in range(np):
6065361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = offset
6075361Srstrong@cs.ucsd.edu
60810608Sdam.sunwoo@arm.com    if options.take_simpoint_checkpoints != None:
60910608Sdam.sunwoo@arm.com        simpoints, interval_length = parseSimpointAnalysisFile(options, testsys)
61010608Sdam.sunwoo@arm.com
6117531Ssteve.reinhardt@amd.com    checkpoint_dir = None
6129816Sjthestness@gmail.com    if options.checkpoint_restore:
6139816Sjthestness@gmail.com        cpt_starttick, checkpoint_dir = findCptDir(options, cptdir, testsys)
61413357Sciro.santilli@arm.com    root.apply_config(options.param)
6157531Ssteve.reinhardt@amd.com    m5.instantiate(checkpoint_dir)
6163395Shsul@eecs.umich.edu
61710757SCurtis.Dunham@arm.com    # Initialization is complete.  If we're not in control of simulation
61810757SCurtis.Dunham@arm.com    # (that is, if we're a slave simulator acting as a component in another
61910757SCurtis.Dunham@arm.com    #  'master' simulator) then we're done here.  The other simulator will
62010757SCurtis.Dunham@arm.com    # call simulate() directly. --initialize-only is used to indicate this.
62110757SCurtis.Dunham@arm.com    if options.initialize_only:
62210757SCurtis.Dunham@arm.com        return
62310757SCurtis.Dunham@arm.com
6249816Sjthestness@gmail.com    # Handle the max tick settings now that tick frequency was resolved
6259816Sjthestness@gmail.com    # during system instantiation
6269816Sjthestness@gmail.com    # NOTE: the maxtick variable here is in absolute ticks, so it must
6279816Sjthestness@gmail.com    # include any simulated ticks before a checkpoint
6289816Sjthestness@gmail.com    explicit_maxticks = 0
6299816Sjthestness@gmail.com    maxtick_from_abs = m5.MaxTick
6309816Sjthestness@gmail.com    maxtick_from_rel = m5.MaxTick
6319816Sjthestness@gmail.com    maxtick_from_maxtime = m5.MaxTick
6329816Sjthestness@gmail.com    if options.abs_max_tick:
6339816Sjthestness@gmail.com        maxtick_from_abs = options.abs_max_tick
6349816Sjthestness@gmail.com        explicit_maxticks += 1
6359816Sjthestness@gmail.com    if options.rel_max_tick:
6369816Sjthestness@gmail.com        maxtick_from_rel = options.rel_max_tick
6379816Sjthestness@gmail.com        if options.checkpoint_restore:
6389816Sjthestness@gmail.com            # NOTE: this may need to be updated if checkpoints ever store
6399816Sjthestness@gmail.com            # the ticks per simulated second
6409816Sjthestness@gmail.com            maxtick_from_rel += cpt_starttick
6419867Sjthestness@gmail.com            if options.at_instruction or options.simpoint:
6429867Sjthestness@gmail.com                warn("Relative max tick specified with --at-instruction or" \
6439867Sjthestness@gmail.com                     " --simpoint\n      These options don't specify the " \
6449867Sjthestness@gmail.com                     "checkpoint start tick, so assuming\n      you mean " \
6459867Sjthestness@gmail.com                     "absolute max tick")
6469816Sjthestness@gmail.com        explicit_maxticks += 1
6479816Sjthestness@gmail.com    if options.maxtime:
6489816Sjthestness@gmail.com        maxtick_from_maxtime = m5.ticks.fromSeconds(options.maxtime)
6499816Sjthestness@gmail.com        explicit_maxticks += 1
6509816Sjthestness@gmail.com    if explicit_maxticks > 1:
6519816Sjthestness@gmail.com        warn("Specified multiple of --abs-max-tick, --rel-max-tick, --maxtime."\
6529816Sjthestness@gmail.com             " Using least")
6539816Sjthestness@gmail.com    maxtick = min([maxtick_from_abs, maxtick_from_rel, maxtick_from_maxtime])
6549816Sjthestness@gmail.com
6559816Sjthestness@gmail.com    if options.checkpoint_restore != None and maxtick < cpt_starttick:
6569816Sjthestness@gmail.com        fatal("Bad maxtick (%d) specified: " \
6579816Sjthestness@gmail.com              "Checkpoint starts starts from tick: %d", maxtick, cpt_starttick)
6589816Sjthestness@gmail.com
6593481Shsul@eecs.umich.edu    if options.standard_switch or cpu_class:
6605361Srstrong@cs.ucsd.edu        if options.standard_switch:
66112564Sgabeblack@google.com            print("Switch at instruction count:%s" %
66212564Sgabeblack@google.com                    str(testsys.cpu[0].max_insts_any_thread))
6635361Srstrong@cs.ucsd.edu            exit_event = m5.simulate()
6645361Srstrong@cs.ucsd.edu        elif cpu_class and options.fast_forward:
66512564Sgabeblack@google.com            print("Switch at instruction count:%s" %
66612564Sgabeblack@google.com                    str(testsys.cpu[0].max_insts_any_thread))
6675361Srstrong@cs.ucsd.edu            exit_event = m5.simulate()
6685361Srstrong@cs.ucsd.edu        else:
66912564Sgabeblack@google.com            print("Switch at curTick count:%s" % str(10000))
6705361Srstrong@cs.ucsd.edu            exit_event = m5.simulate(10000)
67112564Sgabeblack@google.com        print("Switched CPUS @ tick %s" % (m5.curTick()))
6723395Shsul@eecs.umich.edu
6739521SAndreas.Sandberg@ARM.com        m5.switchCpus(testsys, switch_cpu_list)
6743395Shsul@eecs.umich.edu
6753481Shsul@eecs.umich.edu        if options.standard_switch:
67612564Sgabeblack@google.com            print("Switch at instruction count:%d" %
67712564Sgabeblack@google.com                    (testsys.switch_cpus[0].max_insts_any_thread))
6785361Srstrong@cs.ucsd.edu
6795361Srstrong@cs.ucsd.edu            #warmup instruction count may have already been set
6805361Srstrong@cs.ucsd.edu            if options.warmup_insts:
6815361Srstrong@cs.ucsd.edu                exit_event = m5.simulate()
6825361Srstrong@cs.ucsd.edu            else:
6839151Satgutier@umich.edu                exit_event = m5.simulate(options.standard_switch)
68412564Sgabeblack@google.com            print("Switching CPUS @ tick %s" % (m5.curTick()))
68512564Sgabeblack@google.com            print("Simulation ends instruction count:%d" %
68612564Sgabeblack@google.com                    (testsys.switch_cpus_1[0].max_insts_any_thread))
6879521SAndreas.Sandberg@ARM.com            m5.switchCpus(testsys, switch_cpu_list1)
6883395Shsul@eecs.umich.edu
6897489Ssteve.reinhardt@amd.com    # If we're taking and restoring checkpoints, use checkpoint_dir
6907489Ssteve.reinhardt@amd.com    # option only for finding the checkpoints to restore from.  This
6917489Ssteve.reinhardt@amd.com    # lets us test checkpointing by restoring from one set of
6927489Ssteve.reinhardt@amd.com    # checkpoints, generating a second set, and then comparing them.
69310608Sdam.sunwoo@arm.com    if (options.take_checkpoints or options.take_simpoint_checkpoints) \
69410608Sdam.sunwoo@arm.com        and options.checkpoint_restore:
69510608Sdam.sunwoo@arm.com
6967489Ssteve.reinhardt@amd.com        if m5.options.outdir:
6977489Ssteve.reinhardt@amd.com            cptdir = m5.options.outdir
6987489Ssteve.reinhardt@amd.com        else:
6997489Ssteve.reinhardt@amd.com            cptdir = getcwd()
7007489Ssteve.reinhardt@amd.com
7015369Ssaidi@eecs.umich.edu    if options.take_checkpoints != None :
7029140Snilay@cs.wisc.edu        # Checkpoints being taken via the command line at <when> and at
7039140Snilay@cs.wisc.edu        # subsequent periods of <period>.  Checkpoint instructions
7049140Snilay@cs.wisc.edu        # received from the benchmark running are ignored and skipped in
7059140Snilay@cs.wisc.edu        # favor of command line checkpoint instructions.
7069606Snilay@cs.wisc.edu        exit_event = scriptCheckpoints(options, maxtick, cptdir)
70710608Sdam.sunwoo@arm.com
70810608Sdam.sunwoo@arm.com    # Take SimPoint checkpoints
70910608Sdam.sunwoo@arm.com    elif options.take_simpoint_checkpoints != None:
71010608Sdam.sunwoo@arm.com        takeSimpointCheckpoints(simpoints, interval_length, cptdir)
71110608Sdam.sunwoo@arm.com
71210608Sdam.sunwoo@arm.com    # Restore from SimPoint checkpoints
71310608Sdam.sunwoo@arm.com    elif options.restore_simpoint_checkpoint != None:
71410608Sdam.sunwoo@arm.com        restoreSimpointCheckpoint()
71510608Sdam.sunwoo@arm.com
7169140Snilay@cs.wisc.edu    else:
7179151Satgutier@umich.edu        if options.fast_forward:
7189151Satgutier@umich.edu            m5.stats.reset()
71912564Sgabeblack@google.com        print("**** REAL SIMULATION ****")
7209151Satgutier@umich.edu
7219140Snilay@cs.wisc.edu        # If checkpoints are being taken, then the checkpoint instruction
7229140Snilay@cs.wisc.edu        # will occur in the benchmark code it self.
7239151Satgutier@umich.edu        if options.repeat_switch and maxtick > options.repeat_switch:
7249460Ssaidi@eecs.umich.edu            exit_event = repeatSwitch(testsys, repeat_switch_cpu_list,
7259151Satgutier@umich.edu                                      maxtick, options.repeat_switch)
7269151Satgutier@umich.edu        else:
7279460Ssaidi@eecs.umich.edu            exit_event = benchCheckpoints(options, maxtick, cptdir)
7283395Shsul@eecs.umich.edu
72912564Sgabeblack@google.com    print('Exiting @ tick %i because %s' %
73012564Sgabeblack@google.com          (m5.curTick(), exit_event.getCause()))
7316776SBrad.Beckmann@amd.com    if options.checkpoint_at_end:
7327525Ssteve.reinhardt@amd.com        m5.checkpoint(joinpath(cptdir, "cpt.%d"))
7339457Svilanova@ac.upc.edu
73412880Sjason@lowepower.com    if exit_event.getCode() != 0:
73512880Sjason@lowepower.com        print("Simulated exit code not 0! Exit code is", exit_event.getCode())
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