Searched hist:52 (Results 126 - 150 of 992) sorted by relevance
| /gem5/ext/mcpat/cacti/ | ||
| H A D | wire.cc | 10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source this patch adds the source for mcpat, a power, area, and timing modeling framework. |
| H A D | wire.h | 10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source this patch adds the source for mcpat, a power, area, and timing modeling framework. |
| /gem5/ext/mcpat/ | ||
| H A D | core.cc | 10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source this patch adds the source for mcpat, a power, area, and timing modeling framework. |
| H A D | core.h | 10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source this patch adds the source for mcpat, a power, area, and timing modeling framework. |
| H A D | interconnect.cc | 10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source this patch adds the source for mcpat, a power, area, and timing modeling framework. |
| H A D | interconnect.h | 10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source this patch adds the source for mcpat, a power, area, and timing modeling framework. |
| H A D | iocontrollers.cc | 10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source this patch adds the source for mcpat, a power, area, and timing modeling framework. |
| H A D | iocontrollers.h | 10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source this patch adds the source for mcpat, a power, area, and timing modeling framework. |
| H A D | logic.cc | 10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source this patch adds the source for mcpat, a power, area, and timing modeling framework. |
| H A D | logic.h | 10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source this patch adds the source for mcpat, a power, area, and timing modeling framework. |
| H A D | main.cc | 10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source this patch adds the source for mcpat, a power, area, and timing modeling framework. |
| H A D | memoryctrl.cc | 10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source this patch adds the source for mcpat, a power, area, and timing modeling framework. |
| H A D | memoryctrl.h | 10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source this patch adds the source for mcpat, a power, area, and timing modeling framework. |
| H A D | noc.cc | 10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source this patch adds the source for mcpat, a power, area, and timing modeling framework. |
| H A D | noc.h | 10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source this patch adds the source for mcpat, a power, area, and timing modeling framework. |
| H A D | xmlParser.cc | 10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source this patch adds the source for mcpat, a power, area, and timing modeling framework. |
| H A D | xmlParser.h | 10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source this patch adds the source for mcpat, a power, area, and timing modeling framework. |
| /gem5/src/arch/arm/ | ||
| H A D | nativetrace.hh | diff 6398:7a94cba72e02 Mon Jul 27 03:52:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Make native trace only print when registers are changing value. When registers have incorrect values but aren't actively changing, it's likely they're not being modified at all. The fact that they're still wrong isn't very important. |
| /gem5/src/arch/x86/isa/insts/general_purpose/arithmetic/ | ||
| H A D | add_and_subtract.py | diff 8610:9bdd52a2214c Thu Nov 03 23:52:00 EDT 2011 Nilay Vaish<nilay@cs.wisc.edu> x86: Add microop for fence This patch adds a new microop for memory barrier. The microop itself does nothing, but since it is marked as a memory barrier, the O3 CPU should flush all the pending loads and stores before the fence to the memory system. |
| H A D | increment_and_decrement.py | diff 8610:9bdd52a2214c Thu Nov 03 23:52:00 EDT 2011 Nilay Vaish<nilay@cs.wisc.edu> x86: Add microop for fence This patch adds a new microop for memory barrier. The microop itself does nothing, but since it is marked as a memory barrier, the O3 CPU should flush all the pending loads and stores before the fence to the memory system. |
| /gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/ | ||
| H A D | xchg.py | diff 8610:9bdd52a2214c Thu Nov 03 23:52:00 EDT 2011 Nilay Vaish<nilay@cs.wisc.edu> x86: Add microop for fence This patch adds a new microop for memory barrier. The microop itself does nothing, but since it is marked as a memory barrier, the O3 CPU should flush all the pending loads and stores before the fence to the memory system. |
| /gem5/src/arch/x86/isa/insts/general_purpose/ | ||
| H A D | logical.py | diff 8610:9bdd52a2214c Thu Nov 03 23:52:00 EDT 2011 Nilay Vaish<nilay@cs.wisc.edu> x86: Add microop for fence This patch adds a new microop for memory barrier. The microop itself does nothing, but since it is marked as a memory barrier, the O3 CPU should flush all the pending loads and stores before the fence to the memory system. |
| /gem5/src/mem/slicc/symbols/ | ||
| H A D | Var.py | diff 9219:258753d3bc47 Wed Sep 12 15:52:00 EDT 2012 Jason Power <power.jg@gmail.com> Ruby: Modify Scons so that we can put .sm files in extras Also allows for header files which are required in slicc generated code to be in a directory other than src/mem/ruby/slicc_interface. |
| /gem5/ext/dramsim2/ | ||
| H A D | SConscript | diff 11294:a368064a2ab5 Mon Jan 11 05:52:00 EST 2016 Andreas Hansson <andreas.hansson@arm.com> scons: Enable -Wextra by default Make best use of the compiler, and enable -Wextra as well as -Wall. There are a few issues that had to be resolved, but they are all trivial. |
| /gem5/ext/nomali/ | ||
| H A D | SConscript | diff 11294:a368064a2ab5 Mon Jan 11 05:52:00 EST 2016 Andreas Hansson <andreas.hansson@arm.com> scons: Enable -Wextra by default Make best use of the compiler, and enable -Wextra as well as -Wall. There are a few issues that had to be resolved, but they are all trivial. |
Completed in 67 milliseconds