Searched hist:5059 (Results 1 - 7 of 7) sorted by relevance

/gem5/src/arch/arm/insts/
H A Dmisc.hhdiff 12358:386d26feb00f Tue Feb 07 06:35:00 EST 2017 Nikos Nikoleris <nikos.nikoleris@arm.com> arm: Add support for the mcr dc{ic,i,c}mvac, dccmvau instructions

This patch adds support for the ARMv7 cache maintenance
intructions:
* mcr dccmvac cleans a VA to the PoC
* mcr dcimvac invalidates a VA to the PoC
* mcr dccimvac cleans and invalidates a VA to the PoC
* mcr dccmvau cleans a VA to the PoU

Change-Id: I6511f203039ca145cc9128ddf61d09d6d7e40c10
Reviewed-by: Stephan Diestelhorst <stephan.diestelhorst@arm.com>
Reviewed-by: Anouk Van Laer <anouk.vanlaer@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/5059
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
H A Dmisc.ccdiff 12358:386d26feb00f Tue Feb 07 06:35:00 EST 2017 Nikos Nikoleris <nikos.nikoleris@arm.com> arm: Add support for the mcr dc{ic,i,c}mvac, dccmvau instructions

This patch adds support for the ARMv7 cache maintenance
intructions:
* mcr dccmvac cleans a VA to the PoC
* mcr dcimvac invalidates a VA to the PoC
* mcr dccimvac cleans and invalidates a VA to the PoC
* mcr dccmvau cleans a VA to the PoU

Change-Id: I6511f203039ca145cc9128ddf61d09d6d7e40c10
Reviewed-by: Stephan Diestelhorst <stephan.diestelhorst@arm.com>
Reviewed-by: Anouk Van Laer <anouk.vanlaer@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/5059
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
/gem5/src/arch/arm/isa/templates/
H A Dmisc.isadiff 12358:386d26feb00f Tue Feb 07 06:35:00 EST 2017 Nikos Nikoleris <nikos.nikoleris@arm.com> arm: Add support for the mcr dc{ic,i,c}mvac, dccmvau instructions

This patch adds support for the ARMv7 cache maintenance
intructions:
* mcr dccmvac cleans a VA to the PoC
* mcr dcimvac invalidates a VA to the PoC
* mcr dccimvac cleans and invalidates a VA to the PoC
* mcr dccmvau cleans a VA to the PoU

Change-Id: I6511f203039ca145cc9128ddf61d09d6d7e40c10
Reviewed-by: Stephan Diestelhorst <stephan.diestelhorst@arm.com>
Reviewed-by: Anouk Van Laer <anouk.vanlaer@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/5059
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
/gem5/src/arch/arm/isa/formats/
H A Dmisc.isadiff 12358:386d26feb00f Tue Feb 07 06:35:00 EST 2017 Nikos Nikoleris <nikos.nikoleris@arm.com> arm: Add support for the mcr dc{ic,i,c}mvac, dccmvau instructions

This patch adds support for the ARMv7 cache maintenance
intructions:
* mcr dccmvac cleans a VA to the PoC
* mcr dcimvac invalidates a VA to the PoC
* mcr dccimvac cleans and invalidates a VA to the PoC
* mcr dccmvau cleans a VA to the PoU

Change-Id: I6511f203039ca145cc9128ddf61d09d6d7e40c10
Reviewed-by: Stephan Diestelhorst <stephan.diestelhorst@arm.com>
Reviewed-by: Anouk Van Laer <anouk.vanlaer@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/5059
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
/gem5/src/arch/arm/isa/insts/
H A Dmisc.isadiff 12358:386d26feb00f Tue Feb 07 06:35:00 EST 2017 Nikos Nikoleris <nikos.nikoleris@arm.com> arm: Add support for the mcr dc{ic,i,c}mvac, dccmvau instructions

This patch adds support for the ARMv7 cache maintenance
intructions:
* mcr dccmvac cleans a VA to the PoC
* mcr dcimvac invalidates a VA to the PoC
* mcr dccimvac cleans and invalidates a VA to the PoC
* mcr dccmvau cleans a VA to the PoU

Change-Id: I6511f203039ca145cc9128ddf61d09d6d7e40c10
Reviewed-by: Stephan Diestelhorst <stephan.diestelhorst@arm.com>
Reviewed-by: Anouk Van Laer <anouk.vanlaer@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/5059
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
/gem5/src/arch/x86/isa/microops/
H A Dregop.isadiff 5059:33478a26f73e Thu Sep 06 19:18:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Add a square root microop and the SSE sqrt instruction.
/gem5/src/arch/x86/isa/decoder/
H A Dtwo_byte_opcodes.isadiff 5059:33478a26f73e Thu Sep 06 19:18:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Add a square root microop and the SSE sqrt instruction.

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