Searched hist:5045 (Results 1 - 7 of 7) sorted by relevance
| /gem5/src/arch/x86/ | ||
| H A D | x86_traits.hh | diff 5045:bf06c4d63bf4 Wed Sep 05 02:31:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Add floating point micro registers. |
| /gem5/src/arch/x86/insts/ | ||
| H A D | static_inst.cc | diff 5045:bf06c4d63bf4 Wed Sep 05 02:31:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Add floating point micro registers. |
| /gem5/src/mem/cache/ | ||
| H A D | write_queue_entry.cc | diff 12345:70c783a93195 Tue May 31 13:03:00 EDT 2016 Nikos Nikoleris <nikos.nikoleris@arm.com> mem: Add support for WriteClean packets in the memory system This change adds support for creating and handling WriteClean packets. The WriteClean operation is almost identical to a WritebackDirty with the exception that the cache generating a WriteClean retains a copy of the block. Change-Id: I63c8de62919fad0f9547d412f8266aa4292ebecd Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Anouk Van Laer <anouk.vanlaer@arm.com> Reviewed-on: https://gem5-review.googlesource.com/5045 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com> |
| H A D | cache.hh | diff 12345:70c783a93195 Tue May 31 13:03:00 EDT 2016 Nikos Nikoleris <nikos.nikoleris@arm.com> mem: Add support for WriteClean packets in the memory system This change adds support for creating and handling WriteClean packets. The WriteClean operation is almost identical to a WritebackDirty with the exception that the cache generating a WriteClean retains a copy of the block. Change-Id: I63c8de62919fad0f9547d412f8266aa4292ebecd Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Anouk Van Laer <anouk.vanlaer@arm.com> Reviewed-on: https://gem5-review.googlesource.com/5045 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com> |
| H A D | cache.cc | diff 12345:70c783a93195 Tue May 31 13:03:00 EDT 2016 Nikos Nikoleris <nikos.nikoleris@arm.com> mem: Add support for WriteClean packets in the memory system This change adds support for creating and handling WriteClean packets. The WriteClean operation is almost identical to a WritebackDirty with the exception that the cache generating a WriteClean retains a copy of the block. Change-Id: I63c8de62919fad0f9547d412f8266aa4292ebecd Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Anouk Van Laer <anouk.vanlaer@arm.com> Reviewed-on: https://gem5-review.googlesource.com/5045 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com> |
| /gem5/src/arch/x86/isa/ | ||
| H A D | microasm.isa | diff 5045:bf06c4d63bf4 Wed Sep 05 02:31:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Add floating point micro registers. |
| /gem5/src/mem/ | ||
| H A D | coherent_xbar.cc | diff 12345:70c783a93195 Tue May 31 13:03:00 EDT 2016 Nikos Nikoleris <nikos.nikoleris@arm.com> mem: Add support for WriteClean packets in the memory system This change adds support for creating and handling WriteClean packets. The WriteClean operation is almost identical to a WritebackDirty with the exception that the cache generating a WriteClean retains a copy of the block. Change-Id: I63c8de62919fad0f9547d412f8266aa4292ebecd Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Anouk Van Laer <anouk.vanlaer@arm.com> Reviewed-on: https://gem5-review.googlesource.com/5045 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com> |
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